User's Manual

CL865-DUAL Hardware User Guide
1vv0301104 Rev.1 – 2014-03-07
Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights
Reserved. Page 49 of 70
Mod. 0805 2011-07 Rev.2
11.1. Logic Level Specification
Where not specifically stated, all the interface circuits work at 1.8V CMOS logic levels.
The following table shows the logic level specifications used in the CL865 interface circuits:
Absolute Maximum Ratings -Not Functional
Parameter
Min
Max
Input level on any digital pin (CMOS 1.8) with respect to ground
-0.3V
2.3V
Operating Range - Interface levels (1.8V CMOS)
Parameter
Min
Max
Input high level
1.5V
2.1V
Input low level
0.0V
0.35V
Output high level
1.35V
1.8V
Output low level
0.0V
0.45V
Current characteristics
Parameter
Typical
Output Current
2mA
Input Current
30uA
11.2. Using a GPIO Pad as Input
The GPIO pads, when used as inputs, can be connected to a digital output of another device
and report its status, provided this device has interface levels compatible with the 1.8V
CMOS levels of the GPIO.
If the digital output of the device to be connected with the GPIO input pad has interface levels
different from the 1.8V CMOS, then it can be buffered with an open collector transistor with a
47KΩ pull-up resistor to 1.8V.
NOTE:
In order to avoid a back powering effect it is recommended to avoid having any HIGH logic
level signal applied to the digital pins of the module when it is powered OFF or during an
ON/OFF transition.