LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
APPLICABILITY TABLE PRODUCTS LE910-NA V2 LE910-SV V2 LE910-EU V2 LE910-AU V2 LE910-JN V2 LE910-JK V2 LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
SPECIFICATIONS SUBJECT TO CHANGE WITHOUT NOTICE LEGAL NOTICE These Specifications are general guidelines pertaining to product selection and application and may not be appropriate for your particular project. Telit (which hereinafter shall include, its agents, licensors and affiliated companies) makes no representation as to the particular products identified in this document and makes no endorsement of any product.
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CONTENTS 1 Introduction 8 1.1 Scope 8 1.2 Audience 8 1.3 Contact Information, Support 8 1.4 List of acronyms 9 1.5 Text Conventions 11 1.6 Related Documents 11 2 3 Overview Pins Allocation 12 13 3.1 Pin-out 13 3.2 LGA Pads Layout 20 4 Power Supply 21 4.1 Power Supply Requirements 21 4.2 Power Consumption 22 4.3 General Design Rules 23 4.3.1 Electrical Design Guidelines 23 4.3.1.1 +5V Source Power Supply Design Guidelines 23 4.3.1.
5.5.3.2 Modem serial port 2 (USIF1) 44 5.5.3.3 RS232 level translation 45 5.6 General Purpose I/O 46 5.6.1 Using a GPIO as INPUT 47 5.6.2 Using a GPIO as OUTPUT 47 5.6.3 Indication of network service availability 47 5.7 External SIM Holder 49 5.8 ADC Converter 49 6 RF Section 50 6.1 Bands Variants 50 6.2 TX Output Power 50 6.3 RX Sensitivity 51 6.4 Antenna Requirements 53 6.4.1 PCB design guidelines 56 6.4.2 PCB Guidelines in case of FCC Certification 57 6.4.2.
11 Conformity Assessment Issues 76 11.1 FCC/IC Regulatory notices 76 12 Safety Recommendations 79 12.1 READ CAREFULLY 79 13 Document History 80 13.1 Revisions 80 LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
1 INTRODUCTION 1.1 Scope Scope of this document is to give a description of some hardware solutions useful for developing a product with the Telit LE910 V2 module. 1.2 Audience This document is intended for Telit customers, who are integrators, about to implement their applications using our LE910 V2 modules. 1.3 Contact Information, Support For general contact, technical support services, technical questions and report documentation errors contact Telit Technical Support at: TS-EMEA@telit.
1.
Acronym Description DVI Digital Voice Interface MRDY Master Ready SRDY Slave Ready CS Chip Select RTC Real Time Clock ESR Equivalent Series Resistance VSWR Voltage Standing Wave Radio VNA Vector Network Analyzer LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
1.5 Text Conventions Danger – This information MUST be followed or catastrophic equipment failure or bodily injury may occur. Caution or Warning – Alerts the user to important points about integrating the module, if these points are not followed, the module and end user equipment may fail or malfunction. Tip or Information – Provides advice and suggestions that may be useful when integrating the module. All dates are in ISO 8601 format, i.e. YYYY-MM-DD. 1.
2 OVERVIEW The aim of this document is the description of some hardware solutions useful for developing a product with the Telit LE910 V2 module. In this document all the basic functions of a mobile phone will be taken into account; for each one of them a proper hardware solution will be suggested and eventually the wrong solutions and common errors to be avoided will be evidenced. Obviously this document cannot embrace the whole hardware solutions and products that may be designed.
3 PINS ALLOCATION 3.1 Pin-out Pin Signal I/O Function Type Comment USB HS 2.0 COMMUNICATION PORT B15 USB_D+ I/O USB differential Data (+) C15 USB_D- I/O USB differential Data (-) A13 VUSB I Power sense for the internal USB transceiver. Asynchronous Serial Port (USIF0) - Prog. / Data + HW Flow Control N15 C103/TXD I Serial data input from DTE CMOS 1.8V M15 C104/RXD O Serial data output to DTE CMOS 1.8V M14 C108/DTR I Input for (DTR) from DTE CMOS 1.
A5 SIMIO I/O External SIM signal – Data I/O 1.8 / 3V A4 SIMIN I External SIM signal – Presence (active low) CMOS 1.8 A3 SIMVCC - External SIM signal – Power supply for the SIM 1.8 / 3V Internal pullup 47K Digital Voice Interface (DVI) B9 DVI_WA0 I/O Digital Audio Interface (WA0) 1.8V B6 DVI_RX I Digital Audio Interface (RX) 1.8V B7 DVI_TX I/O Digital Audio Interface (TX) 1.8V B8 DVI_CLK I/O Digital Audio Interface (CLK) 1.8V D15 SPI_MOSI I SPI MOSI CMOS 1.
ADC_IN1 AI Analog / Digital converter input A/D K1 ANTENNA I/O GSM/EDGE/UMTS Antenna (50 ohm) RF F1 ANT_DIV I Antenna Diversity Input (50 ohm) RF B1 Accepted values 0 to 1.2V DC RF SECTION Miscellaneous Functions R13 HW_SHUTDOWN* I HW Unconditional Shutdown 1.8V Active low R12 ON_OFF* I Input command for power ON 1.8V Active low C14 VRTC I VRTC Backup capacitor Power backup for the embedded RTC supply (1.
F2 GND - Ground Power G2 GND - Ground Power H2 GND - Ground Power J2 GND - Ground Power K2 GND - Ground Power L2 GND - Ground Power R2 GND - Ground Power M3 GND - Ground Power N3 GND - Ground Power P3 GND - Ground Power R3 GND - Ground Power D4 GND - Ground Power M4 GND - Ground Power N4 GND - Ground Power P4 GND - Ground Power R4 GND - Ground Power N5 GND - Ground Power P5 GND - Ground Power R5 GND - Ground Power
E14 GND - Ground C1 RESERVED - RESERVED D1 RESERVED - RESERVED B2 RESERVED - RESERVED C2 RESERVED - RESERVED D2 RESERVED - RESERVED B3 RESERVED - RESERVED C3 RESERVED - RESERVED D3 RESERVED - RESERVED E3 RESERVED - RESERVED F3 RESERVED - RESERVED G3 RESERVED - RESERVED H3 RESERVED - RESERVED J3 RESERVED - RESERVED K3 RESERVED - RESERVED L3 RESERVED - RESERVED B4 RESERVED - RESERVED C4 RESERVED - RESERVED B5 RESERVED - RESERVED C5 R
P11 RESERVED - RESERVED B12 RESERVED - RESERVED D12 RESERVED - RESERVED N12 RESERVED - RESERVED P12 RESERVED - RESERVED F14 RESERVED - RESERVED G14 RESERVED - RESERVED H14 RESERVED - RESERVED J14 RESERVED - RESERVED K14 RESERVED - RESERVED N13 RESERVED - RESERVED L13 RESERVED - RESERVED J13 RESERVED - RESERVED M13 RESERVED - RESERVED K13 RESERVED - RESERVED H13 RESERVED - RESERVED G13 RESERVED - RESERVED F13 RESERVED - RESERVED B11 RES
K15 RESERVED - RESERVED J15 RESERVED - RESERVED WARNING: Reserved pins must not be connected. LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
3.
4 POWER SUPPLY The power supply circuitry and board layout are a very important part in the full product design and they strongly reflect on the product overall performances, hence read carefully the requirements and the guidelines that will follow for a proper design. 4.1 Power Supply Requirements The external power supply must be connected to VBATT & VBATT_PA signals and must fulfil the following requirements: Power Supply Value Nominal Supply Voltage 3.8V Normal Operating Voltage Range 3.
4.2 Power Consumption The reported values in the following table has to be considered preliminary: Mode Average (mA) Mode Description Switched Off 94uA Module supplied but switched off AT+CFUN=5 1.3mA (WCDMA) EGPRS mode 550mA Typical (max UL throughput, class 33, 3.80V supply) HSUPA mode 550mA Typical (max UL throughput, 3.80V supply) LTE mode 550mA Typical (max UL throughput, 3.
4.3 General Design Rules The principal guidelines for the Power Supply Design embrace three different design steps: the electrical design the thermal design the PCB layout. 4.3.1 Electrical Design Guidelines The electrical design of the power supply depends strongly from the power source where this power is drained. We will distinguish them into three categories: +5V input (typically PC internal regulator output) +12V input (typically automotive) Battery 4.3.1.
4.3.1.2 + 12V input Source Power Supply Design Guidelines The desired output for the power supply is 3.8V, hence due to the big difference between the input source and the desired output, a linear regulator is not suited and shall not be used. A switching power supply will be preferable because of its better efficiency. When using a switching regulator, a 500kHz or more switching frequency regulator is preferable because of its smaller inductor size and its faster transient response.
4.3.1.3 Battery Source Power Supply Design Guidelines The desired nominal output for the power supply is 3.8V and the maximum voltage allowed is 4.2V, hence a single 3.7V Li-Ion cell battery type is suited for supplying the power to the Telit LE910 V2 module. A Bypass low ESR capacitor of adequate capacity must be provided in order to cut the current absorption peaks, a 100μF tantalum capacitor is usually suited. Make sure the low ESR capacitor (usually a tantalum one) is rated at least 10V.
4.3.1.4 Thermal Design Guidelines Worst case as reference values for thermal design of LE910 V2 are: Average current consumption: 800 mA Supply voltage: 3.80V NOTE: Make PCB design in order to have the best connection of GND pads to large surfaces. NOTE: The LE910 V2 includes a function to prevent overheating. LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
4.3.1.5 Power Supply PCB layout Guidelines As seen on the electrical design guidelines the power supply shall have a low ESR capacitor on the output to cut the current peaks on the input to protect the supply from spikes The placement of this component is crucial for the correct working of the circuitry. A misplaced component can be useless or can even decrease the power supply performances.
The below figure shows the recommended circuit: LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
4.4 RTC Bypass out The VRTC pin brings out the Real Time Clock supply, which is separate from the rest of the digital part, allowing having only RTC going on when all the other parts of the device are off. To this power output a backup capacitor can be added in order to increase the RTC autonomy during power off of the battery. NO Devices must be powered from this pin.
5 DIGITAL SECTION 5.1 Logic Levels ABSOLUTE MAXIMUM RATINGS – NOT FUNCTIONAL: Parameter Min Max Input level on any digital pin (CMOS 1.8) with respect to ground -0.3V 2.1V Input level on any digital pin (CMOS 1.2) with respect to ground -0.3V 1.4V OPERATING RANGE - INTERFACE LEVELS (1.8V CMOS): Parameter Min Max Input high level 1.5V 1.9V Input low level 0V 0.35V Output high level 1.6V 1.9V Output low level 0V 0.2V Parameter Min Max Input high level 0.9V 1.
5.2 Power on To turn on the LE910 V2 the pad ON_OFF* must be tied low for at least 5 seconds and then released. The maximum current that can be drained from the ON_OFF* pad is 0,1 mA. A simple circuit to do it is: NOTE: Don't use any pull up resistor on the ON_OFF* line, it is internally pulled up. Using pull up resistor may bring to latch up problems on the LE910 V2 power regulator and improper power on/off of the module.
A flow chart showing the proper turn on procedure is displayed below: “Modem ON Proc” START N VBATT > 3.10V ? Y Y PWRMON=ON ? N ON_OFF* = LOW GO TO “HW Shutdown Unconditional” Delay = 5 sec ON_OFF* = HIGH PWRMON=ON ? N Y Delay = 1 sec GO TO “Start AT Commands”” “Modem ON Proc” END LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
A flow chart showing the AT commands managing procedure is displayed below: “Start AT CMD” START Delay = 300 msec Enter AT AT answer in 1 sec ? N GO TO “HW Shutdown Unconditional” Y “Start AT CMD” END GO TO “Modem ON Proc.” NOTE: In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the LE910 V2 when the module is powered off or during an ON/OFF transition. LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
For example: 1- Let's assume you need to drive the ON_OFF* pad with a totem pole output of a +3/5 V microcontroller (uP_OUT1): ON_OFF* pad directly with an ON/OFF button: LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
WARNING It is recommended to set the ON_OFF* line LOW to power on the module only after VBATT is higher than 3.10V. In case this condition it is not satisfied you could use the HW_SHUTDOWN* line to recover it and then restart the power on activity using the ON_OFF * line. An example of this is described in the following diagram. Power ON diagram: After HW_SHUTSDOWN* is released you could again use the ON_OFF* line to power on the module. LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
5.3 Power off Turning off of the device can be done in two ways: • via AT command (see LE910 V2 Software User Guide, AT#SHDN) • by tying low pin ON_OFF* Either ways, the device issues a detach request to network informing that the device will not be reachable any more. To turn OFF the LE910 V2 the pad ON_OFF* must be tied low for at least 3 seconds and then released. NOTE: To check if the device has been powered off, the hardware line PWRMON must be monitored.
The following flow chart shows the proper turn off procedure: “Modem OFF Proc.” START PWRMON=ON? N Y AT OFF Mode Key ON_OFF* = LOW Delay >= 3 sec AT#SHDN ON_OFF* = HIGH PWRMON=ON? N “Modem OFF Proc.” END Y N Looping for more than 15s? Y GO TO “HW SHUTDOWN Unconditional” LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
5.4 Unconditional Shutdown HW_SHUTDOWN* is used to unconditionally shutdown the LE910 V2. Whenever this signal is pulled low, the LE910 V2 is reset. When the device is reset it stops any operation. After the release of the line, the LE910 V2 is unconditionally shut down, without doing any detach operation from the network where it is registered. This behaviour is not a proper shut down because any WCDMA device is requested to issue a detach request on turn off.
A typical circuit is the following: For example: Let us assume you need to drive the HW_SHUTDOWN* pad with a totem pole output of a +3/5 V microcontroller (uP_OUT2): NOTE: In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the LE910 V2 when the module is powered off or during an ON/OFF transition. LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
In the following flow chart is detailed the proper restart procedure: “HW SHUTDOWN Unconditional” START HW_SHUTDOWN* = LOW Delay = 1s Delay = 200ms Disconnect VBATT HW_SHUTDOWN* = HIGH PWRMON = ON Y N “HW SHUTDOWN Unconditional” END NOTE: Do not use any pull up resistor on the HW_SHUTDOWN* line nor any totem pole digital output. Using pull up resistor may bring to latch up problems on the LE910 V2 power regulator and improper functioning of the module.
5.5 Communication ports 5.5.1 USB 2.0 HS The LE910 V2 includes one integrated universal serial bus (USB 2.0 HS) transceiver. The following table is listing the available signals: PAD Signal I/O Function Type B15 USB_D+ I/O USB differential Data (+) 3.3V C15 USB_D- I/O USB differential Data (-) 3.3V A13 VUSB AI Power sense for the internal USB transceiver. 5V NOTE Accepted range: 4.4V to 5.25V The USB_DPLUS and USB_DMINUS signals have a clock rate of 480 MHz.
5.5.2 SPI The LE910 V2 Module is provided by one SPI interface. The SPI interface defines two handshake lines for flow control and mutual wake-up of the modem and the Application Processor: SRDY (slave ready) and MRDY (master ready). The AP has the master role, that is, it supplies the clock. The following table is listing the available signals: PAD Signal I/O Function Type NOTE D15 SPI_MOSI I SPI MOSI CMOS 1.8V Shared with TX_AUX E15 SPI_MISO O SPI MISO CMOS 1.
5.5.3 Serial Ports The LE910 V2 module is provided with by 2 Asynchronous serial ports: • MODEM SERIAL PORT 1 (Main) • MODEM SERIAL PORT 2 (Auxiliary) Several configurations can be designed for the serial port on the OEM hardware, but the most common are: • RS232 PC com port • microcontroller UART @ 1.8V (Universal Asynchronous Receive Transmit) • microcontroller UART @ 5V or other voltages different from 1.
NOTE: According to V.24, some signal names are referred to the application side, therefore on the LE910 V2 side these signal are on the opposite direction: TXD on the application side will be connected to the receive line (here named C103/TXD) RXD on the application side will be connected to the transmit line (here named C104/RXD) For a minimum implementation, only the TXD, RXD lines can be connected, the other lines can be left open provided a software flow control is implemented.
5.5.3.3 RS232 level translation In order to interface the LE910 V2 with a PC com port or a RS232 (EIA/TIA-232) application a level translator is required. This level translator must: • invert the electrical signal in both directions; • Change the level from 0/1.8V to +15/-15V. Actually, the RS232 UART 16450, 16550, 16650 & 16750 chipsets accept signals with lower levels on the RS232 side (EIA/TIA-562), allowing a lower voltage-multiplying ratio on the level translator.
5.6 General Purpose I/O The LE910 V2 module is provided by a set of Configurable Digital Input / Output pins (CMOS 1.8V). Input pads can only be read; they report the digital value (high or low) present on the pad at the read time. Output pads can only be written or queried and set the value of the pad output. An alternate function pad is internally controlled by the LE910 V2 firmware and acts depending on the function implemented.
5.6.1 Using a GPIO as INPUT The GPIO pads, when used as inputs, can be connected to a digital output of another device and report its status, provided this device has interface levels compatible with the 1.8V CMOS levels of the GPIO. If the digital output of the device to be connected with the GPIO input pad has interface levels different from the 1.8V CMOS, then it can be buffered with an open collector transistor with a 47K pull up to 1.8V supplied by VAUX/POWERMON R11 pad.
The reference schematic for LED indicator. : R3 must be calculated taking in account VBATT value and LED type. LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
5.7 External SIM Holder Please refer to 0 the related User Guide (SIM Holder Design Guides, 80000NT10001a). 5.8 ADC Converter The LE910 V2 is provided by one AD converter. It is able to read a voltage level in the range of 0÷1.2 volts applied on the ADC pin input, store and convert it into 10 bit word. The input line is named as ADC_IN1 and it is available on Pad B1 The following table is showing the ADC characteristics: Item Min Typical Max Unit Input Voltage range 0 - 1.
6 RF SECTION 6.1 Bands Variants The following table is listing the supported Bands: Product 4G bands 3G bands 2G bands LE910-NA V2 FDD B2, B4, B5, B12, B17 B2, B5 - LE910-SV V2 FDD B2, B4, B13 - - LE910-EU V2 FDD B1, B3, B7, B8, B20 B1, B8 900 /1800 LE910-AU V2 FDD B3, B7, B28H/L - - LE910-JN V2 FDD B1, B19, B21 - - LE910-JK V2 FDD B1, B11, B26 - - 6.2 TX Output Power Band Power Class LTE All Bands Class 3 (0.2W) WCDMA All Bands Class 3 (0.
6.3 RX Sensitivity LE910-NA V2 Band Sensitivity LTE FDD B2 -103.0 dBm LTE FDD B4 -102.5 dBm LTE FDD B5 -103.0 dBm LTE FDD B12/B17 -103.0 dBm LTE FDD B13 -103.0 dBm WCDMA FDD B2 -113.0 dBm WCDMA FDD B5 -113.0 dBm LE910-SV V2 Band Sensitivity LTE FDD B2 -103.0 dBm LTE FDD B4 -102.5 dBm LTE FDD B13 -103.0 dBm LE910-AU V2 Band Sensitivity LTE FDD B3 -102.5 dBm LTE FDD B7 -101.5 dBm LTE FDD B28 -100.0 dBm LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
LE910-EU V2 Band Sensitivity LTE FDD B1 -103.0 dBm LTE FDD B3 -101.5 dBm LTE FDD B7 -101.5 dBm LTE FDD B8 -102.5 dBm LTE FDD B20 -101.5 dBm WCDMA FDD B1 -113.0 dBm WCDMA FDD B8 -113.0 dBm GSM 900 -112.5 dBm GSM 1800 -111.5 dBm LE910-JN V2 Band Sensitivity LTE FDD B1 -103.0 dBm LTE FDD B19 -103.0 dBm LTE FDD B21 -103.0 dBm LE910-JK V2 Band Sensitivity LTE FDD B1 -103.0 dBm LTE FDD B11 -103.0 dBm LTE FDD B26 -102.5 dBm LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
6.4 Antenna Requirements The antenna connection and board layout design are the most important aspect in the full product design as they strongly affect the product overall performances, hence read carefully and follow the requirements and the guidelines for a proper design.
LE910-EU V2 Item Value Frequency range Depending by frequency band(s) provided by the network operator, the customer shall use the most suitable antenna for that/those band(s) Bandwidth 250 MHz in LTE/WCDMA Band 1 170 MHz in LTE/WCDMA Band 3 / DCS1800 190 MHz in LTE Band 7 80 MHz in LTE/WCDMA Band 8 / GSM900 71 MHz in LTE Band 20 Impedance 50 ohm Input power > 24dBm Average power VSWR absolute max ≤ 10:1 (limit to avoid permanent damage) VSWR recommended ≤ 2:1 (limit to fulfill all regulatory r
LE910-JK V2 Item Value Frequency range Depending by frequency band(s) provided by the network operator, the customer shall use the most suitable antenna for that/those band(s) Bandwidth 250 MHz in LTE Band 1 68 MHz in LTE Band 11 45 MHz in LTE Band 26 Impedance 50 ohm Input power > 24dBm Average power VSWR absolute max ≤ 10:1 (limit to avoid permanent damage) VSWR recommended ≤ 2:1 (limit to fulfill all regulatory requirements) LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
6.4.1 PCB design guidelines When using the LE910 V2, since there's no antenna connector on the module, the antenna must be connected to the LE910 V2 antenna pad (K1) by means of a transmission line implemented on the PCB.
The following image is showing the suggested layout for the Antenna pad connection: 6.4.2 PCB Guidelines in case of FCC Certification In the case FCC certification is required for an application using LE910 V2, according to FCC KDB 996369 for modular approval requirements, the transmission line has to be similar to that implemented on LE910 V2 interface board and described in the following chapter. 6.4.2.
6.4.2.2 Transmission Line Measurements An HP8753E VNA (Full-2-port calibration) has been used in this measurement session. A calibrated coaxial cable has been soldered at the pad corresponding to RF output; a SMA connector has been soldered to the board in order to characterize the losses of the transmission line including the connector itself. During Return Loss / impedance measurements, the transmission line has been terminated to 50 Ω load.
Line input impedance (in Smith Chart format, once the line has been terminated to 50 Ω load) is shown in the following figure: Insertion Loss of G-CPW line plus SMA connector is shown below: LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
6.4.2.3 Antenna Installation Guidelines Install the antenna in a place covered by the LTE signal. Antenna must not be installed inside metal cases Antenna shall also be installed according Antenna manufacturer instructions Antenna integration should optimize the Radiation Efficiency. Efficiency values > 50% are recommended on all frequency bands Antenna integration should not dramatically perturb the radiation pattern.
6.5 Antenna Diversity Requirements This product is including an input for a second Rx antenna to improve radio sensitivity. This function is named Antenna Diversity.
LE910-EU V2 Item Value Frequency range Depending by frequency band(s) provided by the network operator, the customer shall use the most suitable antenna for that/those band(s) Bandwidth 60 MHz in LTE/WCDMA Band 1 75 MHz in LTE/WCDMA Band 3 / DCS1800 70 MHz in LTE Band 7 35 MHz in LTE/WCDMA Band 8 / GSM900 30 MHz in LTE Band 20 Impedance 50 ohm VSWR recommended ≤ 2:1 (limit to obtain the maximum sensitivity) LE910-JN V2 Item Value Frequency range Depending by frequency band(s) provided by the ne
When using the LE910 V2, since there's no antenna connector on the module, the diversity antenna must be connected to the LE910 V2 Diversity Antenna pad (F1) by means of a transmission line implemented on the PCB. The second Rx antenna should not be located in the close vicinity of main antenna.
7 AUDIO SECTION OVERVIEW The Telit digital audio interface (DVI) of the LE910-V2 Module is based on the I2S serial bus interface standard. The audio port can be directly connected to end device using digital interface, or via one of the several compliant codecs (in case an analog audio is needed). 7.1 Electrical Characteristics The product is providing the DVI on the following pins: Pin Signal I/O Function B9 DVI_WA0 I/O Digital Audio Interface (Word Alignment / LRCLK) CMOS 1.
8 MECHANICAL DESIGN 8.1 Drawing PIN B1 Lead Free Alloy: Surface Finishing Ni/Au for all solder pads Dimensions in mm LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
9 APPLICATION PCB DESIGN The LE910 V2 modules have been designed in order to be compliant with a standard lead-free SMT process. 9.1 Footprint TOP VIEW In order to easily rework the LE910 V2 is suggested to consider on the application a 1.5 mm placement inhibit area around the module. It is also suggested, as common rule for an SMT component, to avoid having a mechanical part of the application in direct contact with the module.
9.2 PCB pad design Non solder mask defined (NSMD) type is recommended for the solder pads on the PCB. Copper Pad Solder Mask PCB SMD (Solder Mask Defined) 9.3 NSMD (Non Solder Mask Defined) PCB pad dimensions The recommendation for the PCB pads dimensions are described in the following image (dimensions in mm) Solder resist openings LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
It is not recommended to place via or micro-via not covered by solder resist in an area of 0,3 mm around the pads unless it carries the same signal of the pad itself (see following figure). Inhibit area for micro-via Holes in pad are allowed only for blind holes and not for through holes. Recommendations for PCB pad surfaces: Finish Layer Thickness (um) Properties Electro-less Ni / Immersion Au 3 –7 / 0.05 – 0.
9.4 Stencil Stencil’s apertures layout can be the same of the recommended footprint (1:1), we suggest a thickness of stencil foil ≥ 120 µm. 9.5 Solder paste Item Lead Free Solder Paste Sn/Ag/Cu We recommend using only “no clean” solder paste in order to avoid the cleaning of the modules after assembly. 9.6 Solder reflow Recommended solder reflow profile: LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
Profile Feature Pb-Free Assembly Average ramp-up rate (TL to TP) 3°C/second max Preheat – Temperature Min (Tsmin) – Temperature Max (Tsmax) – Time (min to max) (ts) 150°C 200°C 60-180 seconds Tsmax to TL – Ramp-up Rate 3°C/second max Time maintained above: – Temperature (TL) – Time (tL) 217°C 60-150 seconds Peak Temperature (Tp) 245 +0/-5°C Time within 5°C of actual Peak Temperature (tp) 10-30 seconds Ramp-down Rate 6°C/second max. Time 25°C to Peak Temperature 8 minutes max.
10 PACKAGING 10.1 Tray The LE910 modules are packaged on trays that can be used in SMT processes for pick & place handling.The first Marketing and Engineering samples of the LE910 V2 series will be shipped with the current packaging of the xE910 modules (on trays of 20 pieces each).
LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
10.2 Reel The LE910 can be packaged on reels of 200 pieces each. See figure for module positioning into the carrier. 10.2.1 Carrier Tape detail LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
10.2.2 Reel detail LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
10.2.3 Packaging detail 10.3 Moisture sensitivity The LE910 V2 is a Moisture Sensitive Device level 3, in according with standard IPC/JEDEC J-STD-020, take care all the relatives requirements for using this kind of components. Moreover, the customer has to take care of the following conditions: a) Calculated shelf life in sealed bag: 12 months at <40°C and <90% relative humidity (RH). b) Environmental condition during the production: 30°C / 60% RH according to IPC/JEDEC J-STD-033A paragraph 5.
11 CONFORMITY ASSESSMENT ISSUES 11.1 FCC/IC Regulatory notices Modification statement Telit has not approved any changes or modifications to this device by the user. Any changes or modifications could void the user’s authority to operate the equipment. Telit n’approuve aucune modification apportée à l’appareil par l’utilisateur, quelle qu’en soit la nature. Tout changement ou modification peuvent annuler le droit d’utilisation de l’appareil par l’utilisateur.
Cet appareil est conforme aux limites d'exposition aux rayonnements de la IC pour un environnement non contrôlé. L'antenne doit être installé de façon à garder une distance minimale de 20 centimètres entre la source de rayonnements et votre corps. Gain de l'antenne doit être ci-dessous: Gain de l‘antenne Bande de fréquence LE910-NA V2 LE910-SV V2 700 MHz 6.63 dBi 6.94 dBi 850 MHz 6.63 dBi N/A 1700 MHz 6.00 dBi 6.00 dBi 1900 MHz 8.51 dBi 9.
L'appareil hôte doit être étiqueté comme il faut pour permettre l'identification des modules qui s'y trouvent. L'étiquette de certification du module donné doit être posée sur l'appareil hôte à un endroit bien en vue en tout temps.
12 SAFETY RECOMMENDATIONS 12.1 READ CAREFULLY Be sure the use of this product is allowed in the country and in the environment required. The use of this product may be dangerous and has to be avoided in the following areas: • Where it can interfere with other electronic devices in environments such as hospitals, airports, aircrafts, etc. • Where there is risk of explosion such as gasoline stations, oil refineries, etc.
13 DOCUMENT HISTORY 13.1 Revisions Revision Date Changes 0 2015-01-15 First issue 1 2015-07-01 Updated chapters 3, 4.2, 6 Added RX Sensitivity 2 2015-08-04 Updated chapter 11 LE910 V2 HARDWARE USER GUIDE 1VV0301200 Rev.
