Datasheet

8 11
AGND
ADC08060
D7
13
D6
14
D5
15
D0
22
D1
21
D2
20
D3
19
D4
16
6
3
+3
V
110
5
17
DR GND
10
V
R
T
V
IN
10 PF
+
220
2
V
RB
24
CLK
0.1 PF
9
23
PD
0.1 PF
10 PF
+
+
1 4 18
0.1 PF
10 PF
DR
V
D
V
A
Choke
0.1 PF
10 PF
+
12
+3
V
1
%
1
%
0.1 PF
1.5V
,
nomina
l
7
V
IN
GND
ADC08060
SNAS120H –OCTOBER 2000–REVISED MARCH 2013 www.ti.com
APPLICATIONS INFORMATION
REFERENCE INPUTS
The reference inputs V
RT
and V
RB
are the top and bottom of the reference ladder, respectively. Input signals
between these two voltages will be digitized to 8 bits. External voltages applied to the reference input pins should
be within the range specified in the Operating Ratings (1.0V to (V
A
+ 0.1V) for V
RT
and 0V to (V
RT
− 1.0V) for
V
RB
). Any device used to drive the reference pins should be able to source sufficient current into the V
RT
pin and
sink sufficient current from the V
RB
pin.
The reference bias circuit of Figure 30 is very simple and the performance is adequate for many applications.
However, circuit tolerances will lead to a wide reference voltage range. Superior performance can generally be
achieved by driving the reference pins with a low impedance source.
The circuit of Figure 31 will allow a more accurate setting of the reference voltages. The upper amplifier must be
able to source the reference current as determined by the value of the reference resistor and the value of (V
RT
-
V
RB
). The lower amplifier must be able to sink this reference current. Both should be stable with a capacitive
load. The LM8272 was chosen because of its rail-to-rail input and output capability, its high current output and its
ability to drive large capacitance loads. Of course, the divider resistors at the amplifier input could be changed to
suit your reference voltage needs, or the divider can be replaced with potentiometers or DACs for precise
settings. The bottom of the ladder (V
RB
) may simply be returned to ground if the minimum input signal excursion
is 0V. Be sure that the driving sources can source sufficient current into the V
RT
pin and sink enough current from
the V
RB
pin to keep these pins stable.
V
RT
should always be more positive than V
RB
at least by the minimum V
RT
- V
RB
difference in Electrical
Characteristics to minimize noise. Furthermore, the difference between V
RT
and V
RB
should not exceed the
maximum value specified in Electrical Characteristics to avoid signal distortion.
V
RM
(pin 9) is the center of the reference ladder and should be bypassed to a clean, quiet point in the analog
ground plane with a 0.1 µF capacitor. DO NOT allow this pin to float.
Because of the ladder and external resistor tolerances, the reference voltage can vary too much for some
applications.
Figure 30. Simple, low component count reference biasing.
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