Datasheet

t
CSH
SCLK
CS
t
CSSU
1 2
Z2 Z1 Z0 DB7
Zero
Zero Zero Zero
t
QUIET
Track
3 leading zero bits
8 data bits
CS
SCLK
SDATA
1 2 3 4 5 12 13 14 15 16
TRI-STATE
|
|
|
t
SU
t
CL
t
EN
t
CH
t
ACC
t
H
t
DIS
t
CS
Hold
t
ACQ
17 18
19
20
4 trailing zeroes
ADC081S021
www.ti.com
SNAS308E APRIL 2005REVISED MARCH 2013
Figure 2. ADC081S021 Serial Timing Diagram
Figure 3. SCLK and CS Timing Parameters
Specification Definitions
ACQUISITION TIME is the time required to acquire the input voltage. That is, it is time required for the hold
capacitor to charge up to the input voltage. Acquisition time is measured backwards from the falling edge
of CS when the signal is sampled and the part moves from track to hold. The start of the time interval that
contains T
ACQ
is the 13th rising edge of SCLK of the previous conversion when the part moves from hold
to track. The user must ensure that the time between the 13th rising edge of SCLK and the falling edge of
the next CS is not less than T
ACQ
to meet performance specifications.
APERTURE DELAY is the time after the falling edge of CS when the input signal is acquired or held for
conversion.
APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample.
Aperture jitter manifests itself as noise in the output.
CONVERSION TIMEis the time required, after the input voltage is acquired, for the ADC081S021 to convert the
input voltage to a digital word. This is from the falling edge of CS when the input signal is sampled to the
16th falling edge of SCLK when the SDATA output goes into TRI-STATE.
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1
LSB.
DUTY CYCLE is the ratio of the time that a repetitive digital waveform is high to the total time of one period. The
specification here refers to the SCLK.
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE BITS) is another method of specifying Signal-to-Noise
and Distortion or SINAD. ENOB is defined as (SINAD 1.76) / 6.02 and says that the converter is
equivalent to a perfect ADC081S021 of this (ENOB) number of bits.
FULL POWER BANDWIDTHis a measure of the frequency at which the reconstructed output fundamental drops
3 dB below its low frequency value for a full scale input.
GAIN ERRORis the deviation of the last code transition (111...110) to (111...111) from the ideal (V
REF
1 LSB),
after adjusting for offset error.
INTEGRAL NON-LINEARITY (INL) is a measure of the deviation of each individual code from a line drawn from
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: ADC081S021