Datasheet

ADC082S051
SNAS263F NOVEMBER 2004REVISED MARCH 2013
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ADC082S051 Converter Electrical Characteristics
(1)
The following specifications apply for V
A
= +2.7V to 5.25V, GND = 0V, f
SCLK
= 3.2 MHz to 8 MHz, f
SAMPLE
= 200 ksps to 500
ksps, C
L
= 50 pF, unless otherwise noted. Boldface limits apply for T
A
= T
MIN
to T
MAX
: all other limits T
A
= 25°C.
Parameter Test Conditions Typical Limits
(2)
Units
STATIC CONVERTER CHARACTERISTICS
Resolution with No Missing Codes 8 Bits
+0.12 +0.4 LSB (max)
INL Integral Non-Linearity
0.062 0.3 LSB (max)
DNL Differential Non-Linearity ±0.09 ±0.3 LSB (max)
V
OFF
Offset Error 0.53 ±0.7 LSB (max)
OEM Channel to Channel Offset Error Match 0.005 ±0.3 LSB (max)
FSE Full-Scale Error 0.52 ±0.7 LSB (max)
Channel to Channel Full- Scale Error
FSEM 0.006 ±0.3 LSB (max)
Match
DYNAMIC CONVERTER CHARACTERISTICS
V
A
= +2.7V to 5.25V,
SINAD Signal-to-Noise Plus Distortion Ratio 49.5 49.1 dB (min)
f
IN
= 40.2 kHz, 0.02 dBFS
V
A
= +2.7V to 5.25V
SNR Signal-to-Noise Ratio 49.5 49.2 dB (min)
f
IN
= 40.2 kHz, 0.02 dBFS
V
A
= +2.7V to 5.25V,
THD Total Harmonic Distortion 76 62 dB (max)
f
IN
= 40.2 kHz, 0.02 dBFS
V
A
= +2.7V to 5.25V
SFDR Spurious-Free Dynamic Range 68 63 dB (min)
f
IN
= 40.2 kHz, 0.02 dBFS
ENOB Effective Number of Bits V
A
= +2.7V to 5.25V 7.93 7.9 Bits (min)
V
A
= +2.7V to 5.25V
Channel-to-Channel Crosstalk 73 dB
f
IN
= 40.2 kHz
Intermodulation Distortion, Second V
A
= 5.25V,
78 dB
Order Terms f
a
= 40.161 kHz, f
b
= 41.015 kHz
IMD
Intermodulation Distortion, Third Order V
A
= 5.25V
73 dB
Terms f
a
= 40.161 kHz, f
b
= 41.015 kHz
V
A
= +5V 11 MHz
FPBW -3 dB Full Power Bandwidth
V
A
= +3V 8 MHz
ANALOG INPUT CHARACTERISTICS
V
IN
Input Range 0 to V
A
V
I
DCL
DC Leakage Current ±1 µA (max)
Track Mode 33 pF
C
INA
Input Capacitance
Hold Mode 3 pF
DIGITAL INPUT CHARACTERISTICS
V
A
= +5.25V 2.4 V (min)
V
IH
Input High Voltage
V
A
= +3.6V 2.1 V (min)
V
IL
Input Low Voltage 0.8 V (max)
I
IN
Input Current V
IN
= 0V or V
IN
= V
A
±10 µA (max)
C
IND
Digital Input Capacitance 2 4 pF (max)
(1) Min/max specification limits are ensured by design, test, or statistical analysis.
(2) Tested limits are ensured to TI's AOQL (Average Outgoing Quality Level).
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