Datasheet

ADC0831-N, ADC0832-N, ADC0834-N, ADC0838-N
SNAS531B –AUGUST 1999–REVISED MARCH 2013 www.ti.com
Cop Coding Example
Mnemonic Instruction
LEI ENABLES SIO's INPUT AND OUTPUT
SC C = 1
OGI G0 = 0 (CS = 0)
CLR A CLEARS ACCUMULATOR
AISC 1 LOADS ACCUMULATOR WITH 1
XAS EXCHANGES SIO WITH ACCUMULATOR
AND STARTS SK CLOCK
LDD LOADS MUX ADDRESS FROM RAM
INTO ACCUMULATOR
NOP -
XAS LOADS MUX ADDRESS FROM
ACCUMULATOR
↑
8 INSTRUCTIONS
↓
XAS READS HIGH ORDER NIBBLE (4 BITS)
INTO ACCUMULATOR
XIS PUTS HIGH ORDER NIBBLE INTO RAM
CLER A CLEARS ACCUMULATOR
RC C = 0
XAS READS LOW ORDER NIBBLE INTO
ACCUMULATOR AND STOPS SK
XIS PUTS LOW ORDER NIBBLE INTO RAM
OGI G0 = 1 (CS = 1)
LEI DISABLES SIO's INPUT AND OUTPUT
8048 Coding Example
Mnemonic Instruction
START: ANL P1, #0F7H ;SELECT A/D (CS = 0)
MOV B, #5 ;BIT COUNTER←5
MOV A, #ADDR ;A←MUX ADDRESS
LOOP 1: RRC A ;CY←ADDRESS BIT
JC ONE ;TEST BIT
;BIT=0
ZERO: ANL P1, #0FEH ;DI←0
JMP CONT ;CONTINUE
;BIT=1
ONE: ORL P1, #1 ;DI←1
CONT: CALL PULSE ;PULSE SK 0→1→0
DJNZ B, LOOP 1 ;CONTINUE UNTIL
DONE
CALL PULSE ;EXTRA CLOCK FOR
SYNC
MOV B, #8 ;BIT COUNTER←8
LOOP 2: CALL PULSE ;PULSE SK 0→1→0
IN A, P1 ;CY←DO
RRC A
RRC A
MOV A, C ;A←RESULT
RLC A ;A(0)←BIT AND SHIFT
MOV C, A ;C←RESULT
DJNZ B, LOOP 2 ;CONTINUE UNTIL
DONE
RETR
;PULSE SUBROUTINE
PULSE: ORL P1, #04 ;SK←1
NOP ;DELAY
ANL P1, #0FBH ;SK←0
RET
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