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ADC084S021

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SNAS279E –APRIL 2005–REVISED MARCH 2013

ADC084S021 4-Channel, 50 ksps to 200 Ksps, 8-Bit A/D Converter

Check for Samples: ADC084S021

FEATURES

DESCRIPTION

• Specified Over a Range of Sample Rates.

The ADC084S021 is a low-power, four-channel

• Four Input Channels

CMOS 8-bit analog-to-digital converter with a high-

• Variable Power Management

speed serial interface. Unlike the conventional

practice of specifying performance at a single sample

• Single Power Supply with 2.7V - 5.25V Range

rate only, the ADC084S021 is fully specified over a

sample rate range of 50 ksps to 200 ksps. The

APPLICATIONS

converter is based upon a successive-approximation

• Portable Systems

circuit. It can be configured to accept up to four input

• Remote Data Acquisition

signals at inputs IN1 through IN4.

• Instrumentation and Control Systems

The output serial data is straight binary, and is

KEY SPECIFICATIONS compatible with several standards, such as SPI™,

QSPI™, MICROWIRE, and many common DSP

• DNL: ±0.04 LSB (typ)

serial interfaces.

• INL: ±0.04 LSB (typ)

The ADC084S021 operates with a single supply that

• SNR: 49.6 dB (typ)

can range from +2.7V to +5.25V. Normal power

• Power Consumption

consumption using a +3V or +5V supply is 1.6 mW

and 5.8 mW, respectively. The power-down feature

– 3V Supply: 1.6 mW (typ)

reduces the power consumption to just 0.12 µW using

– 5V Supply: 5.8 mW (typ)

a +3V supply, or 0.35 µW using a +5V supply.

The ADC084S021 is packaged in a 10-lead VSSOP

package. Operation over the industrial temperature

range of −40°C to +85°C is ensured.

Table 1. Pin-Compatible Alternatives by Resolution and Speed

Resolution Specified for Sample Rate Range of:

50 to 200 ksps 200 to 500 ksps 500 ksps to 1 Msps

12-bit ADC124S021 ADC124S051 ADC124S101

10-bit ADC104S021 ADC104S051 ADC104S101

8-bit ADC084S021 ADC084S051 ADC084S101

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (26 pages)

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ADC084S021 www.ti.com SNAS279E – APRIL 2005 – REVISED MARCH 2013 ADC084S021 4-Channel, 50 ksps to 200 Ksps, 8-Bit A/D Converter Check for Samples: ADC084S021 FEATURES 1 • • • • 2 Specified Over a Range of Sample Rates. Four Input Channels Variable Power Management Single Power Supply with 2.7V - 5.25V Range APPLICATIONS • • • Portable Systems Remote Data Acquisition Instrumentation and Control Systems KEY SPECIFICATIONS • • • • DNL: ±0.04 LSB (typ) INL: ±0.04 LSB (typ) SNR: 49.
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ADC084S021 SNAS279E – APRIL 2005 – REVISED MARCH 2013 www.ti.com Connection Diagram 1 10 VA 2 9 DOUT GND 3 8 DIN CS ADC084S021 SCLK IN4 4 7 IN1 IN3 5 6 IN2 Figure 1. 10-Lead VSSOP See DGK Package Block Diagram IN1 . . . IN4 MUX T/H 8-Bit SUCCESSIVE APPROXIMATION ADC VA GND GND SCLK CS CONTROL LOGIC DIN DOUT Pin Descriptions and Equivalent Circuits Pin No. Symbol Description ANALOG I/O 4-7 IN1 to IN4 Analog inputs. These signals can range from 0V to VA.
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ADC084S021 www.ti.com SNAS279E – APRIL 2005 – REVISED MARCH 2013 Absolute Maximum Ratings (1) (2) (3) −0.3V to 6.5V Supply Voltage VA Voltage on Any Pin to GND −0.3V to VA +0.
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ADC084S021 SNAS279E – APRIL 2005 – REVISED MARCH 2013 www.ti.com ADC084S021 Converter Electrical Characteristics (1) The following specifications apply for VA = +2.7V to 5.25V, GND = 0V, fSCLK = 0.8 MHz to 3.2 MHz, fSAMPLE = 50 ksps to 200 ksps, CL = 50 pF, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C. Symbol Parameter Conditions Typical Limits (2) Units STATIC CONVERTER CHARACTERISTICS Resolution with No Missing Codes 8 Bits ±0.04 ±0.
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ADC084S021 www.ti.com SNAS279E – APRIL 2005 – REVISED MARCH 2013 ADC084S021 Converter Electrical Characteristics (1) (continued) The following specifications apply for VA = +2.7V to 5.25V, GND = 0V, fSCLK = 0.8 MHz to 3.2 MHz, fSAMPLE = 50 ksps to 200 ksps, CL = 50 pF, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C. Symbol Parameter Conditions Typical Limits (2) Units POWER SUPPLY CHARACTERISTICS (CL = 10 pF) VA Supply Voltage 2.7 V (min) 5.
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ADC084S021 SNAS279E – APRIL 2005 – REVISED MARCH 2013 www.ti.com ADC084S021 Timing Specifications The following specifications apply for VA = +2.7V to 5.25V, GND = 0V, fSCLK = 0.8 MHz to 3.2 MHz, fSAMPLE = 50 ksps to 200 ksps, CL = 50 pF, Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C. Symbol tCSU Parameter Conditions Typical Limits (2) Setup Time SCLK High to CS Falling Edge (1) 10 (2) VA = +5.0V −0.5 VA = +3.0V +4.5 VA = +5.0V +1.5 VA = +3.0V +4 VA = +5.
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ADC084S021 www.ti.com SNAS279E – APRIL 2005 – REVISED MARCH 2013 Figure 3. Timing Test Circuit CS tCONVERT tACQ tCH SCLK 1 2 3 4 tEN 6 7 Z3 tSU Z2 Z1 11 8 12 13 14 15 tACC tCL DOUT DIN 5 Z0 DB7 DB6 16 tDIS DB5 DB1 DB4 Tri-State DB0 Zero Zero Zero Zero tH DONT DONTC ADD2 ADD1 ADD0 DONTC DONTC DONTC Figure 4. ADC084S021 Serial Timing Diagram CS tCSU SCLK tCLH SCLK Figure 5.
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ADC084S021 SNAS279E – APRIL 2005 – REVISED MARCH 2013 www.ti.com EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE BITS) is another method of specifying Signal-to-Noise and Distortion or SINAD. ENOB is defined as (SINAD − 1.76) / 6.02 and says that the converter is equivalent to a perfect ADC of this (ENOB) number of bits. FULL POWER BANDWIDTH is a measure of the frequency at which the reconstructed output fundamental drops 3 dB below its low frequency value for a full scale input.
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ADC084S021 www.ti.com SNAS279E – APRIL 2005 – REVISED MARCH 2013 Typical Performance Characteristics TA = +25°C, fSAMPLE = 50 ksps to 200 ksps, fSCLK = 0.8 MHz to 3.2 MHz, fIN = 39.9 kHz unless otherwise stated. DNL - VA = 3.0V INL - VA = 3.0V Figure 6. Figure 7. DNL - VA = 5.0V INL - VA = 5.0V Figure 8. Figure 9. DNL vs. Supply INL vs. Supply Figure 10. Figure 11.
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ADC084S021 SNAS279E – APRIL 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) TA = +25°C, fSAMPLE = 50 ksps to 200 ksps, fSCLK = 0.8 MHz to 3.2 MHz, fIN = 39.9 kHz unless otherwise stated. 10 DNL vs. Clock Frequency INL vs. Clock Frequency Figure 12. Figure 13. DNL vs. Clock Duty Cycle INL vs. Clock Duty Cycle Figure 14. Figure 15. DNL vs. Temperature INL vs. Temperature Figure 16. Figure 17.
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ADC084S021 www.ti.com SNAS279E – APRIL 2005 – REVISED MARCH 2013 Typical Performance Characteristics (continued) TA = +25°C, fSAMPLE = 50 ksps to 200 ksps, fSCLK = 0.8 MHz to 3.2 MHz, fIN = 39.9 kHz unless otherwise stated. SNR vs. Supply THD vs. Supply Figure 18. Figure 19. SNR vs. Clock Frequency THD vs. Clock Frequency Figure 20. Figure 21. SNR vs. Clock Duty Cycle THD vs. Clock Duty Cycle Figure 22. Figure 23.
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ADC084S021 SNAS279E – APRIL 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) TA = +25°C, fSAMPLE = 50 ksps to 200 ksps, fSCLK = 0.8 MHz to 3.2 MHz, fIN = 39.9 kHz unless otherwise stated. 12 SNR vs. Input Frequency THD vs. Input Frequency Figure 24. Figure 25. SNR vs. Temperature THD vs. Temperature Figure 26. Figure 27. SFDR vs. Supply SINAD vs. Supply Figure 28. Figure 29.
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ADC084S021 www.ti.com SNAS279E – APRIL 2005 – REVISED MARCH 2013 Typical Performance Characteristics (continued) TA = +25°C, fSAMPLE = 50 ksps to 200 ksps, fSCLK = 0.8 MHz to 3.2 MHz, fIN = 39.9 kHz unless otherwise stated. SFDR vs. Clock Frequency SINAD vs. Clock Frequency Figure 30. Figure 31. SFDR vs. Clock Duty Cycle SINAD vs. Clock Duty Cycle Figure 32. Figure 33. SFDR vs. Input Frequency SINAD vs. Input Frequency Figure 34. Figure 35.
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ADC084S021 SNAS279E – APRIL 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) TA = +25°C, fSAMPLE = 50 ksps to 200 ksps, fSCLK = 0.8 MHz to 3.2 MHz, fIN = 39.9 kHz unless otherwise stated. 14 SFDR vs. Temperature SINAD vs. Temperature Figure 36. Figure 37. ENOB vs. Supply ENOB vs. Clock Frequency Figure 38. Figure 39. ENOB vs. Clock Duty Cycle ENOB vs. Input Frequency Figure 40. Figure 41.
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ADC084S021 www.ti.com SNAS279E – APRIL 2005 – REVISED MARCH 2013 Typical Performance Characteristics (continued) TA = +25°C, fSAMPLE = 50 ksps to 200 ksps, fSCLK = 0.8 MHz to 3.2 MHz, fIN = 39.9 kHz unless otherwise stated. ENOB vs. Temperature Spectral Response - 3V, 200 ksps Figure 42. Figure 43. Spectral Response - 5V, 200 ksps Power Consumption vs. Throughput Figure 44. Figure 45.
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ADC084S021 SNAS279E – APRIL 2005 – REVISED MARCH 2013 www.ti.com APPLICATIONS INFORMATION ADC084S021 OPERATION The ADC084S021 is a successive-approximation analog-to-digital converter designed around a chargeredistribution digital-to-analog converter. Simplified schematics of the ADC084S021 in both track and hold modes are shown in Figure 46 and Figure 47, respectively.
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ADC084S021 www.ti.com SNAS279E – APRIL 2005 – REVISED MARCH 2013 A serial frame is initiated on the falling edge of CS and ends on the rising edge of CS. Each frame must contain an integer multiple of 16 rising SCLK edges. The ADC output data (DOUT) is in a high impedance state when CS is high and is active when CS is low. CS thus acts as an output enable, in addition to being a start conversion input.
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ADC084S021 SNAS279E – APRIL 2005 – REVISED MARCH 2013 www.ti.com 111...111 111...000 | | ADC CODE 111...110 1LSB = VA/256 011...111 000...010 | 000...001 000...000 0V ½ LSB ANALOG INPUT +VA - 1 LSB Figure 48. Ideal Transfer Characteristic TYPICAL APPLICATION CIRCUIT A typical application of the ADC084S021 is shown in Figure 50. Power is provided, in this example, by the Texas Instruments LP2950 low-dropout voltage regulator, available in a variety of fixed and adjustable output voltages.
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ADC084S021 www.ti.com SNAS279E – APRIL 2005 – REVISED MARCH 2013 The capacitor C1 in Figure 50 has a typical value of 3 pF, and is mainly the package pin capacitance. Resistor R1 is the on resistance of the multiplexer and track / hold switch, which is typically 500 ohms. Capacitor C2 is the ADC084S021 sampling capacitor, which is typically 30 pF. The ADC084S021 will deliver best performance when driven by a low-impedance source to eliminate distortion caused by the charging of the sampling capacitance.
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ADC084S021 SNAS279E – APRIL 2005 – REVISED MARCH 2013 www.ti.com To keep noise out of the power supply, keep the output load capacitance as small as practical. If the load capacitance is greater than 50 pF, use a 100 Ω series resistor at the ADC output, located as close to the ADC output pin as practical. This will limit the charge and discharge current of the output capacitance and improve noise performance.
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ADC084S021 www.ti.com SNAS279E – APRIL 2005 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision D (March 2013) to Revision E • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADC084S021CIMM/NOPB VSSOP DGS 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 ADC084S021CIMMX/NOP VSSOP B DGS 10 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADC084S021CIMM/NOPB VSSOP DGS 10 1000 210.0 185.0 35.0 VSSOP DGS 10 3500 367.0 367.0 35.
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