Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External SOIC 8

ADC08831, ADC08832

www.ti.com

SNAS015C –SEPTEMBER 1999–REVISED MARCH 2013

ADC08831 /ADC08832 8-Bit Serial I/O CMOS A/D Converters with Multiplexer and

Sample/Hold Function

Check for Samples: ADC08831, ADC08832

FEATURES

DESCRIPTION

The ADC08831/ADC08832 are 8-bit successive

• 3-Wire Serial Digital Data Link Requires Few

approximation Analog to Digital converters with 3-wire

I/O Pins

serial interfaces and a configurable input multiplexer

• Analog Input Track/Hold Function

for 2 channels. The serial I/O will interface to

• 2-Channel Input Multiplexer Option with

COPSfamily of micro-controllers, PLD's,

microprocessors, DSP's, or shift registers. The serial

Address Logic

I/O is configured to comply with the MICROWIRE

• Analog Input Voltage Range from GND to V

serial data exchange standard.

• No Zero or Full Scale Adjustment Required

To minimize total power consumption, the

• TTL/CMOS Input/Output Compatible

ADC08831/ADC08832 automatically go into low

• Superior Pin Compatible Replacement for

power mode whenever they are not performing

ADC0831/2

conversions.

A track/hold function allows the analog voltage at the

APPLICATIONS

positive input to vary during the actual A/D

• Digitizing Sensors and Waveforms

conversion.

• Process Control Monitoring

The analog inputs can be configured to operate in

various combinations of single-ended, differential, or

• Remote Sensing in Noisy Environments

pseudo-differential modes. The voltage reference

• Instrumentation

input can be adjusted to allow encoding of small

• Embedded Systems

analog voltage spans to the full 8-bits of resolution.

KEY SPECIFICATIONS

• Resolution: 8 Bits

• Conversion Time (f

= 2 MHz): 4μs (Max)

• Power Dissipation: 8.5mW (Typ)

• Low Power Mode: 3.0mW (Typ)

• Single Supply: 5V

• Total Unadjusted Error: ±1LSB

• No Missing Codes over Temperature

Typical Application

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (31 pages)

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ADC08831, ADC08832 www.ti.com SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 ADC08831 /ADC08832 8-Bit Serial I/O CMOS A/D Converters with Multiplexer and Sample/Hold Function Check for Samples: ADC08831, ADC08832 FEATURES DESCRIPTION • The ADC08831/ADC08832 are 8-bit successive approximation Analog to Digital converters with 3-wire serial interfaces and a configurable input multiplexer for 2 channels.
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ADC08831, ADC08832 SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 www.ti.com Connection Diagram xxx Figure 1. ADC08831 8-Lead SOIC or VSSOP See D or DGK Packages Figure 2. ADC08832 8-Lead SOIC or VSSOP See D or DGK Packages These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) (3) Supply Voltage (VCC) 6.5V −0.
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ADC08831, ADC08832 www.ti.com SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 Electrical Characteristics The following specifications apply for VCC = VREF = +5VDC, and fCLK = 2 MHz unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C. Symbol Parameter Conditions Typical (1) Limits (2) Units (Limits) ±0.3 ±1 LSB (max) CONVERTER AND MULTIPLEXER CHARACTERISTICS TUE See (3) Total Unadjusted Error Offset Error ±0.
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ADC08831, ADC08832 SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 www.ti.com Electrical Characteristics (continued) The following specifications apply for VCC = VREF = +5VDC, and fCLK = 2 MHz unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C. Symbol Parameter Conditions Typical (1) Limits (2) Units (Limits) IOUT TRI-STATE Output Current VOUT = 0V VOUT = 5V −3.0 3.0 μA (max) μA (max) ISOURCE Output Source Current VOUT = 0V −6.
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ADC08831, ADC08832 www.ti.com SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 Dynamic Characteristics The following specifications apply for VCC = 5V, fCLK = 2MHz, TA= 25°C, RSOURCE = 50Ω, fIN = 45kHz, VIN = 5VP, VREF = 5V, non-coherent 2048 samples with windowing. Symbol Parameter Conditions ADC08831 ADC08832 Typical (1) Units (Limits) 181 153 ksps ksps fS Sampling Rate SNR Signal-to -Noise Ratio (4) 48.5 dB THD Total Harmonic Distortion (5) −59.
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ADC08831, ADC08832 SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics The following specifications apply for TA = 25°C, VCC = VREF = 5V, unless otherwise specified. 6 Linearity Error (TUE) vs Reference Voltage Linearity Error (TUE) vs Temperature Figure 3. Figure 4. Linearity Error (TUE) vs Clock Frequency Power Supply Current vs Temperature (ADC08831) Figure 5. Figure 6.
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ADC08831, ADC08832 www.ti.com SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 Typical Performance Characteristics (continued) The following specifications apply for TA = 25°C, VCC = VREF = 5V, unless otherwise specified. Output Current vs Temperature Spectral Response with 10KHz Sine Wave Input Figure 9. Figure 10. Spectral Response with 55 KHz Sine Wave Input Spectral Response with 90 KHz Sine Wave Input Figure 11. Figure 12. Total Unadjuster Error Plot Figure 13.
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ADC08831, ADC08832 SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 www.ti.com Leakage Current Test Circuit Figure 14. TRI-STATE Test Circuits and Waveforms Figure 15. 8 Submit Documentation Feedback Figure 16.
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ADC08831, ADC08832 www.ti.com SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 Timing Diagrams Figure 17. Data Input Timing Figure 18. Data Output Timing Figure 19.
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ADC08831, ADC08832 SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 www.ti.com *LSB first output not available on ADC08831. Figure 20. ADC08831 Timing Figure 21.
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ADC08831, ADC08832 www.ti.com SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 ADC08832 Functional Block Diagram *Some of these functions/pins are not available with other options.
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ADC08831, ADC08832 SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 www.ti.com FUNCTIONAL DESCRIPTION MULTIPLEXER ADDRESSING The design of these converters utilizes a comparator structure with built-in sample-and-hold which provides for a differential analog input to be converted by a successive approximation routine. The actual voltage converted is always the difference between an assigned “+” input terminal and a “−” input terminal.
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ADC08831, ADC08832 www.ti.com SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 To understand the operation of these converters it is best to refer to Timing Diagrams and ADC08832 Functional Block Diagram and to follow a complete conversion sequence. For clarity, a separate timing diagram is shown for each device. 1. A conversion is initiated by pulling the CS (chip select) line low. This line must be held low for the entire conversion.
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ADC08831, ADC08832 SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 www.ti.com REFERENCE CONSIDERATIONS The voltage applied to the reference input on these converters, VREF, defines the voltage span of the analog input (the difference between VIN(MAX) and VIN(MIN) over which the 256 possible output codes apply. The devices can be used either in ratiometric applications or in systems requiring absolute accuracy.
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ADC08831, ADC08832 www.ti.com SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 The differential input of these converters actually reduces the effects of common-mode input noise, a signal common to both selected “+” and “−” inputs for a conversion (60 Hz is most typical). The time interval between sampling the “+” input and then the “−” input is ½ of a clock period. The change in the common-mode voltage during this short time interval can cause conversion errors.
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ADC08831, ADC08832 SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 www.ti.com The zero error of the A/D converter relates to the location of the first riser of the transfer function and can be measured by grounding the VIN (−) input and applying a small magnitude positive voltage to the VIN (+) input. Zero error is the difference between the actual DC input voltage which is necessary to just cause an output digital code transition from 0000 0000 to 0000 0001 and the ideal ½ LSB value (½ LSB = 9.
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ADC08831, ADC08832 www.ti.com SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 Signal-to-Noise Ratio Signal-to-Noise Ratio (SNR) is the ratio of RMS magnitude of the fundamental to the RMS sum of all the nonfundamental signal, excluding the harmonics, up to 1/2 of the sampling frequency (Nyquist). Total Harmonic Distortion Total Harmonic distortion is the ratio of the RMS sum of the amplitude of the harmonics to the fundamental input frequency.
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ADC08831, ADC08832 SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 www.ti.com Applications Figure 23. Low-Cost Remote Temperature Sensor *VIN(−) = 0.15 VCC 15% of VCC ≤ VXDR ≤ 85% of VCC Figure 24.
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ADC08831, ADC08832 www.ti.com SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 Span Adjust; 0V ≤ VIN ≤ 3V Figure 25.
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ADC08831, ADC08832 SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 www.ti.com Diodes are 1N914 Figure 26. Protecting the Input Uses one more wire than load cell itself Two mini-DIPs could be mounted inside load cell for digital output transducer Electronic offset and gain trims relax mechanical specs for gauge factor and offset Low level cell output is converted immediately for high noise immunity Figure 27.
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ADC08831, ADC08832 www.ti.com SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 All power supplied by loop 1500V isolation at output Figure 28.
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ADC08831, ADC08832 SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 www.ti.com Figure 29. Isolated Data Converter Figure 30.
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ADC08831, ADC08832 www.ti.
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ADC08831, ADC08832 SNAS015C – SEPTEMBER 1999 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision B (March 2013) to Revision C • 24 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com (4) 1-Nov-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADC08831IMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 ADC08832IMM VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 ADC08832IMM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADC08831IMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 ADC08832IMM VSSOP DGK 8 1000 210.0 185.0 35.0 ADC08832IMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 ADC08832IMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 ADC08832IMX SOIC D 8 2500 367.0 367.0 35.0 ADC08832IMX/NOPB SOIC D 8 2500 367.0 367.0 35.
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