Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) Supply TSSOP 16

8 9

CS SCLK

DOUT

AGND DIN

IN0 V

IN1 DGND

IN2 IN7

IN3 IN6

IN4 IN5

ADC088S022

www.ti.com

SNAS341F –SEPTEMBER 2005–REVISED MARCH 2013

ADC088S022 8-Channel, 50 ksps to 200 ksps, 8-Bit A/D Converter

Check for Samples: ADC088S022

FEATURES

DESCRIPTION

The ADC088S022 is a low-power, eight-channel

• Eight Input Channels

CMOS 8-bit analog-to-digital converter specified for

• Variable Power Management

conversion throughput rates of 50 ksps to 200 ksps.

• Independent Analog and Digital Supplies

The converter is based on a successive-

approximation register architecture with an internal

• SPI™/ QSPI™/MICROWIRE/DSP Compatible

track-and-hold circuit. It can be configured to accept

• Packaged in 16-Lead TSSOP

up to eight input signals at inputs IN0 through IN7.

The output serial data is straight binary and is

APPLICATIONS

compatible with several standards, such as SPI™,

• Automotive Navigation

QSPI™, MICROWIRE, and many common DSP

• Portable Systems

serial interfaces.

• Medical Instruments

The ADC088S022 may be operated with independent

• Mobile Communications

analog and digital supplies. The analog supply (V

)

can range from +2.7V to +5.25V, and the digital

• Instrumentation and Control Systems

supply (V

) can range from +2.7V to V

. Normal

power consumption using a +3V or +5V supply is 0.9

KEY SPECIFICATIONS

mW and 5.5 mW, respectively. The power-down

• Conversion Rate: 50 ksps to 200 ksps

feature reduces the power consumption to 0.03 µW

using a +3V supply and 0.15 µW using a +5V supply.

• DNL (V

= V

= 2.7V to 5.25V): ±0.2 LSB (Max)

The ADC088S022 is packaged in a 16-lead TSSOP

• INL (V

= V

= 2.7V to 5.25V): ±0.2 LSB (Max)

package. Operation over the extended industrial

• Power Consumption

temperature range of −40°C to +105°C is ensured.

– 3V Supply: 0.9 mW (Typ)

– 5V Supply: 5.5 mw (Typ)

Connection Diagram

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2SPI, QSPI are trademarks of Motorola, Inc..

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (24 pages)

PAGE 1
ADC088S022 www.ti.com SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 ADC088S022 8-Channel, 50 ksps to 200 ksps, 8-Bit A/D Converter Check for Samples: ADC088S022 FEATURES DESCRIPTION • • • • • The ADC088S022 is a low-power, eight-channel CMOS 8-bit analog-to-digital converter specified for conversion throughput rates of 50 ksps to 200 ksps. The converter is based on a successiveapproximation register architecture with an internal track-and-hold circuit.
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ADC088S022 SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com Block Diagram IN0 . . . T/H MUX 8-BIT SUCCESSIVE APPROXIMATION ADC VA AGND AGND IN7 VD SCLK ADC088S022 CONTROL LOGIC CS DIN DOUT DGND PIN DESCRIPTIONS Pin No. Symbol Description ANALOG I/O 4 - 11 IN0 to IN7 Analog inputs. These signals can range from 0V to VREF. DIGITAL I/O 16 SCLK Digital clock input. The specified performance range of frequencies for this input is 0.8 MHz to 3.2 MHz.
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ADC088S022 www.ti.com SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 Absolute Maximum Ratings (1) (2) (3) Analog Supply Voltage VA −0.3V to 6.5V Digital Supply Voltage VD −0.3V to VA + 0.3V, max 6.5V −0.3V to VA +0.
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ADC088S022 SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com ADC088S022 Converter Electrical Characteristics (1) The following specifications apply for VA = VD = +2.7V to +5.25V, AGND = DGND = 0V, fSCLK = 0.8 MHz to 3.2 MHz, fSAMPLE = 50 ksps to 200 ksps, and CL = 50pF, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C.
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ADC088S022 www.ti.com SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 ADC088S022 Converter Electrical Characteristics(1) (continued) The following specifications apply for VA = VD = +2.7V to +5.25V, AGND = DGND = 0V, fSCLK = 0.8 MHz to 3.2 MHz, fSAMPLE = 50 ksps to 200 ksps, and CL = 50pF, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C. Symbol Parameter Conditions Typical Limits (2) Units 2.7 V (min) 5.
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ADC088S022 SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com Timing Diagrams Power Down Power Up Track Power Up Hold Track Hold CS 1 2 3 4 5 6 8 7 9 10 11 12 13 14 15 1 16 2 3 4 5 6 7 8 SCLK Control register DIN ADD2 ADD1 ADD0 DOUT DB7 ADD2 ADD1 ADD0 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5 Figure 1.
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ADC088S022 www.ti.com SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1 LSB. DUTY CYCLE is the ratio of the time that a repetitive digital waveform is high to the total time of one period. The specification here refers to the SCLK. EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE BITS) is another method of specifying Signal-to-Noise and Distortion or SINAD. ENOB is defined as (SINAD - 1.76) / 6.
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ADC088S022 SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics VA = VD = +5.0V, TA = +25°C, fSAMPLE = 200 ksps, fSCLK = 3.2 MHz, fIN = 39.9 kHz unless otherwise stated. 8 DNL DNL Figure 4. Figure 5. INL INL Figure 6. Figure 7. DNL vs. Supply INL vs. Supply Figure 8. Figure 9.
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ADC088S022 www.ti.com SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 Typical Performance Characteristics (continued) VA = VD = +5.0V, TA = +25°C, fSAMPLE = 200 ksps, fSCLK = 3.2 MHz, fIN = 39.9 kHz unless otherwise stated. SNR vs. Supply THD vs. Supply Figure 10. Figure 11. ENOB vs. Supply DNL vs. VD with VA = 5.0 V Figure 12. Figure 13. INL vs. VD with VA = 5.0 V DNL vs. SCLK Duty Cycle Figure 14. Figure 15.
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ADC088S022 SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) VA = VD = +5.0V, TA = +25°C, fSAMPLE = 200 ksps, fSCLK = 3.2 MHz, fIN = 39.9 kHz unless otherwise stated. 10 INL vs. SCLK Duty Cycle SNR vs. SCLK Duty Cycle Figure 16. Figure 17. THD vs. SCLK Duty Cycle ENOB vs. SCLK Duty Cycle Figure 18. Figure 19. DNL vs. SCLK INL vs. SCLK Figure 20. Figure 21.
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ADC088S022 www.ti.com SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 Typical Performance Characteristics (continued) VA = VD = +5.0V, TA = +25°C, fSAMPLE = 200 ksps, fSCLK = 3.2 MHz, fIN = 39.9 kHz unless otherwise stated. SNR vs. SCLK THD vs. SCLK Figure 22. Figure 23. ENOB vs. SCLK DNL vs. Temperature Figure 24. Figure 25. INL vs. Temperature SNR vs. Temperature Figure 26. Figure 27.
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ADC088S022 SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) VA = VD = +5.0V, TA = +25°C, fSAMPLE = 200 ksps, fSCLK = 3.2 MHz, fIN = 39.9 kHz unless otherwise stated. 12 THD vs. Temperature ENOB vs. Temperature Figure 28. Figure 29. SNR vs. Input Frequency THD vs. Input Frequency Figure 30. Figure 31. ENOB vs. Input Frequency Power Consumption vs. SCLK Figure 32. Figure 33.
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ADC088S022 www.ti.com SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 Functional Description The ADC088S022 is a successive-approximation analog-to-digital converter designed around a chargeredistribution digital-to-analog converter. ADC088S022 OPERATION Simplified schematics of the ADC088S022 in both track and hold operation are shown in Figure 34 and Figure 35 respectively.
PAGE 14
ADC088S022 SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com During the first 3 cycles of SCLK, the ADC is in the track mode, acquiring the input voltage. For the next 13 SCLK cycles the conversion is accomplished and the data is clocked out. SCLK falling edges 1 through 4 clock out leading zeros, falling edges 5 through 12 clock out the conversion result, MSB first, and falling edges 13 through 16 clock out trailing zeros.
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ADC088S022 www.ti.com SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 ADC088S022 TRANSFER FUNCTION The output format of the ADC088S022 is straight binary. Code transitions occur midway between successive integer LSB values. The LSB width for the ADC088S022 is VA / 256. The ideal transfer characteristic is shown in Figure 36. The transition from an output code of 0000 0000 to a code of 0000 0001 is at 1/2 LSB, or a voltage of VA / 512. Other code transitions occur at steps of one LSB. 111...111 111...
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ADC088S022 SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT A typical application is shown in Figure 38. The split analog and digital supply pins are both powered in this example by the TI LP2950 low-dropout voltage regulator. The analog supply is bypassed with a capacitor network located close to the ADC088S022. The digital supply is separated from the analog supply by an isolation resistor and bypassed with additional capacitors.
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ADC088S022 www.ti.com PC = tN tN + tS SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 u PN + tS tN + tS u PS (3) Power Supply Noise Considerations The charging of any output load capacitance requires current from the digital supply, VD. The current pulses required from the supply to charge the output capacitance will cause voltage variations on the digital supply. If these variations are large enough, they could degrade SNR and SINAD performance of the ADC.
PAGE 18
ADC088S022 SNAS341F – SEPTEMBER 2005 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision E (March 2013) to Revision F • 18 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device ADC088S022CIMTX ADC088S022CIMTX/NOP B Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TSSOP PW 16 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1 TSSOP PW 16 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADC088S022CIMTX TSSOP PW 16 2500 367.0 367.0 35.0 TSSOP PW 16 2500 367.0 367.0 35.
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