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ADC121C021, ADC121C021Q, ADC121C027

www.ti.com

SNAS415F –JANUARY 2008–REVISED MARCH 2013

ADC121C021/ADC121C021Q/ADC121C027 I

C-Compatible, 12-Bit Analog-to-Digital

Converter with Alert Function

Check for Samples: ADC121C021, ADC121C021Q, ADC121C027

FEATURES

DESCRIPTION

These converters are low-power, monolithic, 12-bit,

• I

C-Compatible 2-Wire Interface Which

analog-to-digital converters (ADCs) that operates

Supports Standard (100kHz), Fast (400kHz),

from a +2.7 to 5.5V supply. The converter is based

and High Speed (3.4MHz) Modes

upon a successive approximation register

• Extended Power Supply Range (+2.7V to

architecture with an internal track-and-hold circuit that

+5.5V)

can handle input frequencies up to 11MHz. These

converters operate from a single supply which also

• Up to Nine Pin-Selectable Chip Addresses

serves as the reference. The device features an I

C-

(VSSOP Only)

compatible serial interface that operates in all three

• Out-of-Range Alert Function

speed modes, including high speed mode (3.4MHz).

• Automatic Power-Down Mode while Not

The ADC121C021's Alert feature provides an

Converting

interrupt that is activated when the analog input

• Very Small 6-Pin SOT and 8-Pin VSSOP

violates a programmable upper or lower limit value.

Packages

The device features an automatic conversion mode,

which frees up the controller and I

C interface. In this

• ADC121C021Q is an Automotive Grade

mode, the ADC continuously monitors the analog

Product that is AEC-Q100 Grade 2 Qualified

input for an "out-of-range" condition and provides an

interrupt if the measured voltage goes out-of-range.

APPLICATIONS

The ADC121C021 comes in two packages: a small 6-

• System Monitoring

pin SOT package with an alert output, and an 8-pin

• Peak Detection

VSSOP package with an alert output and two

• Portable Instruments

address selection inputs. The ADC121C021Q is

available in a 6-pin SOT package. The ADC121C027

• Medical Instruments

comes in a small 6-pin SOT package with an address

• Test Equipment

selection input. The ADC121C027 provides three pin-

• Automotive

selectable addresses while the 8-pin VSSOP version

of the ADC121C021 provides nine pin-selectable

addresses. Pin-compatible alternatives to the 6-pin

KEY SPECIFICATIONS

SOT options are available with additional address

• Resolution: 12 Bits (No Missing Codes)

options.

• Conversion Time: 1µs (Typ)

Normal power consumption using a +3V or +5V

• INL & DNL: ±1 LSB (Max) (Up to 22ksps)

supply is 0.26mW or 0.78mW, respectively. The

• Throughput Rate: 188.9 ksps (Max)

automatic power-down feature reduces the power

consumption to less than 1µW while not converting.

• Power Consumption (at 22 ksps)

Operation over the industrial temperature range of

– 3V Supply: 0.26 mW (Typ)

−40°C to +105°C is ensured. Their low power

– 5v Supply: 0.78 mW (Typ)

consumption and small packages make this family of

ADCs an excellent choice for use in battery operated

equipment.

The ADC121C021 and ADC121C027 are part of a

family of pin-compatible ADCs that also provide 8 and

10 bit resolution. For 8-bit ADCs see the

ADC081C021 and ADC081C027. For 10-bit ADCs

see the ADC101C021 and ADC101C027.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

C is a registered trademark of Phillips Corporation..

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (43 pages)

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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 ADC121C021/ADC121C021Q/ADC121C027 I2C-Compatible, 12-Bit Analog-to-Digital Converter with Alert Function Check for Samples: ADC121C021, ADC121C021Q, ADC121C027 FEATURES 1 • 23 • • • • • • 2 I C-Compatible 2-Wire Interface Which Supports Standard (100kHz), Fast (400kHz), and High Speed (3.4MHz) Modes Extended Power Supply Range (+2.7V to +5.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 PIN DESCRIPTIONS Symbol Type VA Supply Equivalent Circuit Description Power and unbuffered reference voltage. VA must be free of noise and decoupled to GND. GND Ground VIN Analog Input Ground for all on-chip circuitry. ALERT Digital Output SCL Digital Input SDA Digital Input/Output See Figure 22 Analog input. This signal can range from GND to VA. Alert output.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com Absolute Maximum Ratings (1) (2) (3) Supply Voltage, VA -0.3V to +6.5V −0.3V to (VA +0.3V) Voltage on any Analog Input Pin to GND −0.3V to 6.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 Operating Ratings (1) (2) −40°C ≤ TA ≤ +105°C Operating Temperature Range Supply Voltage, VA +2.7V to 5.5V Analog Input Voltage, VIN 0V to VA Digital Input Voltage (3) 0V to 5.5V Sample Rate (1) (2) (3) up to 188.9 ksps Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com Electrical Characteristics (continued) The following specifications apply for VA = +2.7V to +5.5V, GND = 0V, fSCL up to 3.4MHz, fIN = 1kHz for fSCL up to 400kHz, fIN = 10kHz for fSCL = 3.4MHz unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C unless otherwise noted. (1) Symbol Typical (2) Limits (2) Units (Limits) VA = +2.7V to +3.6V 11.7 11.3 Bits (min) VA = +3.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 Electrical Characteristics (continued) The following specifications apply for VA = +2.7V to +5.5V, GND = 0V, fSCL up to 3.4MHz, fIN = 1kHz for fSCL up to 400kHz, fIN = 10kHz for fSCL = 3.4MHz unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C unless otherwise noted. (1) Symbol Limits (2) Units (Limits) Supply Voltage Minimum 2.7 V (min) Supply Voltage Maximum 5.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com A.C. and Timing Characteristics The following specifications apply for VA = +2.7V to +5.5V. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless otherwise specified. Symbol Conditions (1) Parameter Typical (2) Limits (2) Units (Limits) CONVERSION RATE Conversion Time fCONV Conversion Rate 1 µs fSCL = 100kHz 5.56 ksps fSCL = 400kHz 22.2 ksps fSCL = 1.7MHz 94.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 A.C. and Timing Characteristics (continued) The following specifications apply for VA = +2.7V to +5.5V. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless otherwise specified.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com Specification Definitions ACQUISITION TIME is the time required for the ADC to acquire the input voltage. During this time, the hold capacitor is charged by the input voltage. APERTURE DELAY is the time between the start of a conversion and the time when the input signal is internally acquired or held for conversion.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 TOTAL HARMONIC DISTORTION (THD) is the ratio, expressed in dBc, of the rms total of the first n harmonic components at the output to the rms level of the input signal frequency as seen at the output. THD is calculated as THD = 20 x log 10 A f22 + / + A Fn 2 A f12 (1) where Af1 is the RMS power of the input frequency at the output and Af2 through Afn are the RMS power in the first n harmonic frequencies.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics fSCL = 400kHz, fSAMPLE = 22ksps, fIN = 1kHz, VA = 5.0V, TA = +25°C, unless otherwise stated. 12 INL vs. Code - VA=3V DNL vs. Code - VA=3V Figure 5. Figure 6. INL vs. Code - VA=5V DNL vs. Code - VA=5V Figure 7. Figure 8. INL vs. Supply DNL vs. Supply Figure 9. Figure 10.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 Typical Performance Characteristics (continued) fSCL = 400kHz, fSAMPLE = 22ksps, fIN = 1kHz, VA = 5.0V, TA = +25°C, unless otherwise stated. ENOB vs. Supply SINAD vs. Supply Figure 11. Figure 12. FFT Plot FFT Plot Figure 13. Figure 14. Offset Error vs. Temperature Gain Error vs. Temperature Figure 15. Figure 16.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) fSCL = 400kHz, fSAMPLE = 22ksps, fIN = 1kHz, VA = 5.0V, TA = +25°C, unless otherwise stated. Continuous Operation Supply Current vs. VA Automatic Conversion Supply Current vs. VA Figure 17. Figure 18. Power Down (PD1) Supply Current vs. VA Figure 19.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 Functional Description The ADC121C021 is a successive-approximation analog-to-digital converter designed around a chargeredistribution digital-to-analog converter. Unless otherwise stated, references to the ADC121C021 in this section will apply to both the ADC121C021 and the ADC121C027.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com ANALOG INPUT An equivalent circuit for the input of the ADC121C021 is shown in Figure 22. The diodes provide ESD protection for the analog input. The operating range for the analog input is 0 V to VA. Going beyond this range will cause the ESD diodes to conduct and may result in erratic operation. For this reason, these diodes should NOT be used to clamp the input signal.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 REFERENCE VOLTAGE The ADC121C021 uses the supply (VA) as the reference, so VA must be treated as a reference. The analog-todigital conversion will only be as precise as the reference (VA), so the supply voltage should be free of noise. The reference should be driven by a low output impedance voltage source. The Applications section provides recommended ways to drive the ADC reference input appropriately.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com Address Pointer Register The address pointer determines which of the data registers is accessed by the I2C interface. The first data byte of every write operation is stored in the address pointer register. This value selects the register that the following data bytes will be written to or read from. Only the three LSBs of this register are variable. The other bits must always be written to as zeros.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 Alert Status Register This register indicates if a high or a low threshold has been violated. The bits of this register are active high. That is, a high indicates that the respective limit has been violated. Pointer Address 01h (Read/Write) Default Value: 00h D7 D6 D5 D4 D3 D2 Reserved D1 D0 Over Range Alert Under Range Alert Bits Name Description 7:2 Reserved Always reads zeros.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com Bits Name Description 7:5 Cycle Time Configures Automatic Conversion mode. When these bits are set to zeros, the automatic conversion mode is disabled. This is the case at power-up. When these bits are set to a non-zero value, the ADC will begin operating in automatic conversion mode (see Automatic Conversion Mode). The Cycle Time table shows how different values provide various conversion intervals.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 VHIGH -- Alert Limit Register - Over Range This register holds the upper limit threshold used to determine the alert condition. If the conversion moves higher than this limit, a VHIGH alert is generated.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com VMIN -- Lowest Conversion Register This register holds the Lowest Conversion result when in the automatic conversion mode. Each conversion result is compared against the contents of this register. If the value is lower, it becomes the lowest conversion and replaces the current value. If the value is higher, the register contents remain unchanged.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 SERIAL INTERFACE The I2C-compatible interface operates in all three speed modes. Standard mode (100kHz) and Fast mode (400kHz) are functionally the same and will be referred to as Standard-Fast mode in this document. High-Speed mode (3.4MHz) is an extension of Standard-Fast mode and will be referred to as Hs-mode in this document.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com Standard-Fast Mode In Standard-Fast mode, the master generates a start condition by driving SDA from high to low while SCL is high. The start condition is always followed by a 7-bit slave address and a Read/Write bit. After these 8 bits have been transmitted by the master, SDA is released by the master and the ADC121C021 either ACKs or NACKs the address. If the slave address matches, the ADC121C021 ACKs the master.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 SDA NACK MSB 8-ELW 0DVWHU FRGH ³00001[[[´ 7-bit Slave Address Not-Acknowledge from the Device 1 SCL 2 5 6 7 8 9 1 2 Repeated START START Standard-Fast Mode Hs-Mode Figure 26. Beginning Hs-Mode Communication I2C Slave (Hardware) Address The ADC has a seven-bit hardware address which is also referred to as a slave address.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com ALERT FUNCTION The ALERT function is an "out-of-range" indicator. At the end of every conversion, the measured voltage is compared to the values in the VHIGH and VLOW registers. If the measured voltage exceeds the value stored in VHIGH or falls below the value stored in VLOW, an alert condition occurs. The Alert condition is indicated in up to three places.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 AUTOMATIC CONVERSION MODE The automatic conversion mode configures the ADC to continually perform conversions without receiving "read" instructions from the controller over the I2C interface. The mode is activated by writing a non-zero value into the Cycle Time bits - D[7:5] - of the Configuration register (see Configuration Register). Once the ADC121C021 enters this mode, the internal oscillator is always enabled.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 Writing to an ADC Register The following diagrams indicate the sequence of actions required for writing to an ADC121C021 Register.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com QUIET INTERFACE MODE To improve performance at High Speed, operate the ADC in Quiet Interface Mode. This mode provides improved INL and DNL performance in I2C Hs-Mode (3.4MHz). The Quiet Interface mode provides a maximum throughput rate of 162ksps. Figure 35 describes how to read the conversion result register in this mode.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT A typical application circuit is shown in Figure 36. The analog supply is bypassed with a capacitor network located close to the ADC121C021. The ADC uses the analog supply (VA) as its reference voltage, so it is very important that VA be kept as clean as possible.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com BUFFERED INPUT A buffered input application circuit is shown in Figure 37. The analog input is buffered by a Texas Instruments LMP7731. The non-inverting amplifier configuration provides a buffered gain stage for a single ended source. This application circuit is good for single-ended sensor interface.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 Measured Battery Voltage RECHARGE CYCLE VOLTAGE VHigh Limit ALERT pin (Active Low) TIME Figure 39. Recharge Cycle DISCHARGE CYCLE VOLTAGE Measured Battery Voltage VLOW Limit ALERT pin (Active Low) TIME Figure 40. Discharge Cycle In addition to the window supervisory feature, the ADC121C021 will allow the controller to read the battery voltage at any time during operation.
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ADC121C021, ADC121C021Q, ADC121C027 SNAS415F – JANUARY 2008 – REVISED MARCH 2013 www.ti.com LAYOUT, GROUNDING, AND BYPASSING For best accuracy and minimum noise, the printed circuit board containing the ADC121C021 should have separate analog and digital areas. The areas are defined by the locations of the analog and digital power planes. Both of these planes should be located on the same board layer.
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ADC121C021, ADC121C021Q, ADC121C027 www.ti.com SNAS415F – JANUARY 2008 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision E (March 2013) to Revision F • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com (4) 7-Oct-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device ADC121C021CIMK/NOPB Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SOT DDC 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 ADC121C021CIMKX/NOP B SOT DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 ADC121C021CIMM/NOP B VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADC121C021CIMK/NOPB SOT DDC 6 1000 210.0 185.0 35.0 SOT DDC 6 3000 210.0 185.0 35.0 VSSOP DGK 8 1000 210.0 185.0 35.0 VSSOP DGK 8 3500 367.0 367.0 35.0 SOT DDC 6 1000 210.0 185.0 35.0 SOT DDC 6 3000 210.0 185.0 35.0 SOT DDC 6 1000 210.0 185.0 35.0 SOT DDC 6 3000 210.0 185.0 35.
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