Datasheet

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All of the pins on J1 are connected directly to the ADS1115 device input pins, with no protection. Use
appropriate caution when handling these pins. Table 1 summarizes the pinouts for the analog interface J1.
Table 1. J1: Analog Interface Pinout
Description,
Pin Number Signal ADS1015/ADS1115
J1.2 A0(+) AIN0, Device 1 (U1)
J1.4 A1(+) AIN1, Device 1 (U1)
J1.6 A2(+) AIN2, Device 1 (U1)
J1.8 A3(+) AIN3, Device 1 (U1)
J1.10 A0(+) AIN0, Device 2 (U2)
J1.12 A1(+) AIN1, Device 2 (U2)
J1.14 A2(+) AIN2, Device 2 (U2)
J1.16 A3(+) AIN3, Device 2 (U2)
J1.1-7 (odd) Unused
J1.15 Unused
J1.9-19 (odd) AGND Analog ground connections
(except J1.15)
J1.18, J1.20 Unused
3 Digital Interface
3.1 Serial Data Interface
The ADS1115EVM is designed to easily interface with multiple control platforms. Samtec part numbers
SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin, dual-row, header/socket
combination at J3. This header/socket provides access to the digital control and serial data pins of the
ADC. Consult Samtec at http://www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating
connector options.
All logic levels on J3 are 3.3V CMOS, except for the I
2
C pins. These pins conform to 3.3V I
2
C rules.
Table 2 describes the J3 serial interface pins.
Table 2. J3: Serial Interface Pins
Pin No. Pin Name Signal Name I/O Type Pullup Function
J3.1-19 (odd) — Unused — None
J3.2 GPIO0 ALERT/RDY Out None Digital comparator
(U1) output or conversion
ready for Device 1 (U1)
J3.4 DGND DGND In/Out None Digital ground
J3.6 GPIO1 ALERT/RDY Out None Digital comparator
(U2) output or conversion
ready for Device 2 (U2)
J3.8 GPIO2 Unused — None
J3.10 DGND DGND In/Out None Digital ground
J3.12 GPIO3 Unused — None
J3.14 GPIO4 Unused — None
J3.16 SCL SCL I
2
C High I
2
C clock
J3.18 DGND DGND In/Out None Digital ground
J3.20 SDA SDA I
2
C High I
2
C data
4
ADS1015EVM, ADS1115EVM, ADS1015EVM-PDK, and ADS1115EVM-PDK SBAU157B–August 2009–Revised May 2011
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