Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External TSSOP 20

SBAS286C − JUNE 2003 − REVISED JANUARY 2009

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    



FEATURES

D 240SPS Data Rate with 4MHz Clock

D 20-Bit Effective Resolution

D Input Multiplexer with Four Differential

Channels

D Pin-Selectable, High-Impedance Input Buffer

D ±5V Differential Input Range

D 0.0003% INL (typ), 0.0015% INL (max)

D Self-Calibrating

D Simple 2-Wire Serial Interface

D On-Chip Temperature Sensor

D Single Conversions with Standby Mode

D Low Current Consumption: 300µA

D Analog Supply: 2.7V to 5.5V

D Digital Supply: 2.7V to 5.5V

APPLICATIONS

D Hand-Held Instrumentation

D Portable Medical Equipment

D Industrial Process Control

D Weigh Scales

DESCRIPTION

The ADS1224 is a 4-channel, 24-bit, delta-sigma ana-

log-to-digital (A/D) converter. It offers excellent perfor-

mance and low power in a TSSOP-20 package. The

ADS1224 is well-suited for demanding, high-resolution

measurements, especially in portable systems and oth-

er space-saving and power-constrained applications.

A delta-sigma (∆Σ) modulator and digital filter form the

basis of the A/D converter. The analog modulator has

a ±5V differential input range. An input multiplexer

(MUX) is used to select between four separate

differential input channels. A buffer can be selected to

increase the input impedance of the measurement.

A simple, 2-wire serial interface provides all the

necessary control. Data retrieval, self-calibration, and

Standby mode are handled with a few simple

waveforms. When only single conversions are needed,

the ADS1224 can be quickly shut down (Standby mode)

while idle between measurements to dramatically

reduce the overall power consumption. Multiple

ADS1224s can be connected together to create a

synchronously sampling multichannel measurement

system. The ADS1224 is designed to easily connect to

microcontrollers, such as the MSP430.

The ADS1224 supports 2.7V to 5.5V analog supplies

and 2.7V to 5.5V digital supplies. Power is typically less

than 1mW in 3V operation and less than 1µW during

Standby mode.

Mux

Digital Filter

and

Serial Interface

∆Σ

Modulator

VREFP VREFN

Buffer

AVDD DVDD

GNDMUX0

AINP1

AINN1

AINP2

AINN2

AINP3

AINN3

AINP4

AINN4

CLK

DRDY/DOUT

SCLK

TEMPEN

MUX1 BUFEN

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semiconductor products and disclaimers thereto appears at the end of this data sheet.

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Summary of content (32 pages)

PAGE 1
www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 FEATURES D 240SPS Data Rate with 4MHz Clock D 20-Bit Effective Resolution D Input Multiplexer with Four Differential D D D D D D D D D D Channels Pin-Selectable, High-Impedance Input Buffer ±5V Differential Input Range 0.0003% INL (typ), 0.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 ORDERING INFORMATION(1) PRODUCT PACKAGE−LEAD PACKAGE DESIGNATOR SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ADS1224 TSSOP-20 PW −40°C to +85°C ADS1224 ORDERING NUMBER TRANSPORT MEDIA, QUANTITY ADS1224IPWT Tape and Reel, 250 ADS1224IPWR Tape and Reel, 2500 (1) For the most current specification and package information, refer to our web site at www.ti.com.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 ELECTRICAL CHARACTERISTICS All specifications at TA = −40°C to +85°C, AVDD = +5V, DVDD = +5V, fCLK = 2MHz, and VREF = +2.5V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Analog Input Full-scale input voltage Absolute input voltage Differential input impedance Common-mode input impedance ±2VREF AINP − AINN V Buffer off; AINP, AINN with respect to GND GND − 0.1 AVDD + 0.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 ELECTRICAL CHARACTERISTICS (continued) All specifications at TA = −40°C to +85°C, AVDD = +5V, DVDD = +5V, fCLK = 2MHz, and VREF = +2.5V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 0.8 DVDD DVDD + 0.1 V GND − 0.1 0.2 DVDD V Digital Input/Output Logic levels VIH VIL VOH VOL IOH = 1mA IOL = 1mA 0.8 DVDD V Input leakage CLK frequency (fCLK) 0.2 DVDD V ±10 µA 8 MHz 30 70 % AVDD 2.7 5.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 PIN ASSIGNMENTS PW PACKAGE TSSOP (TOP VIEW) DVDD 1 20 AVDD SCLK 2 19 VREFP CLK 3 18 VREFN DRDY/DOUT 4 17 GND MUX0 5 16 AINN1 MUX1 6 15 AINP1 TEMPEN 7 14 AINN2 BUFEN 8 13 AINP2 AINP4 9 12 AINN3 AINN4 10 11 AINP3 ADS1224 Terminal Functions TERMINAL NAME NO.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 TYPICAL CHARACTERISTICS At TA = −40°C to +85°C, AVDD = +5V, DVDD = +5V, fCLK = 2MHz, and VREF = +2.5V, unless otherwise noted.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 TYPICAL CHARACTERISTICS (CONTINUED) At TA = −40°C to +85°C, AVDD = +5V, DVDD = +5V, fCLK = 2MHz, and VREF = +2.5V, unless otherwise noted. INTEGRAL NONLINEARITY vs INPUT VOLTAGE INTEGRAL NONLINEARITY vs INPUT VOLTAGE 0.0010 0.0006 0.0004 fCLK = 2MHz Buffer Off −40_ C 0.0008 0.0006 +25_C IN L (% o f FSR ) IN L (% o f F SR ) 0.0002 0 −0.0002 +85_ C −0.0004 −0.0006 0.0004 +25_C 0.0002 0 +85_C −0.0002 −0.0004 −0.0006 −0.0008 −0.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 as shown in Table 1. The ADS1224 accepts differential input signals, but can also measure unipolar signals. When measuring unipolar (or single-ended signals) with respect to ground, connect the negative input (AINNx) to ground and connect the input signal to the positive input (AINPx). Note that when the ADS1224 is configured this way, only half of the converter full-scale range is used since only positive digital output codes are produced.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 Analog Input Measurement without the Input Buffer With the buffer disabled by setting the BUFEN pin low, the ADS1224 measures the input signal using internal capacitors that are continuously charged and discharged. Figure 14 shows a simplified schematic of the ADS1224 input circuitry, with Figure 15 showing the on/off timings of the switches. The S1 switches close during the input sampling phase.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 TEMPERATURE SENSOR On-chip diodes provide temperature-sensing capability. By setting the TEMPEN pin high, the selected analog inputs are disconnected and the inputs to the A/D converter are connected to the anodes of two diodes scaled to 1x and 64x in current and size inside the mux, as shown in Figure 18. By measuring the difference in voltage of these diodes, temperature changes can be inferred from a baseline temperature.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 For best performance, VREF should be AVDD/2, but it can be raised as high as AVDD. When VREF exceeds AVDD/2, it is not possible to reach the full-scale digital output value corresponding to ±2VREF, since this requires the analog inputs to exceed the power supplies. For example, if VREF = AVDD = 5V, the positive full-scale signal is 10V. The maximum positive input signal that can be supplied before the ESD diodes turn on is when AINP = 5.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 To help see the response at lower frequencies, Figure 21 illustrates the response out to 1kHz. Notice that signals at multiples of 120Hz are rejected. The ADS1224 data rate and frequency response scale directly with CLK frequency. For example, if fCLK increases from 2MHz to 4MHz, the data rate increases from 120SPS to 240SPS, while the notches increase from 120Hz to 240Hz.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 The ADS1224 uses a Sinc3 digital filter to improve noise performance. Therefore, in certain instances, large changes in input will require settling time. For example, an external multiplexer in front of the ADS1224 can put large changes in input voltage by simply switching input channels. Abrupt changes in the input will require three data cycles to settle. When continuously converting, four readings may be necessary to settle the data.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 Data New Data Ready Data Ready MSB DRDY/DOUT 23 LSB 22 21 0 t4 t5 t2 t3 t6 1 SCLK 24 t3 t7 SYMBOL DESCRIPTION t2 t3 t4(1) t5 t6(1) t7(1) MIN DRDY/DOUT low to first SCLK rising edge SCLK positive or negative pulse width SCLK rising edge to new data bit valid: propogation delay SCLK rising edge to old data bit valid: hold time Data updating; no readback allowed Conversion time (1/data rate) MAX 0 100 50 0 48 8.32 8.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 SELF-CALIBRATION STANDBY MODE Self-calibration can be initiated at any time, although in many applications the ADS1224 drift performance is so good that the self-calibration performed automatically at power-up is all that is needed. To initiate self-calibration, apply at least two additional SCLKs after retrieving 24 bits of data. Figure 27 shows the timing pattern. The 25th SCLK will send DRDY/DOUT high.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 Data Ready Standby Mode DRDY/DOUT 23 22 21 0 23 Start Conversion SCLK 1 24 t9 t10 t11 SYMBOL DESCRIPTION t9(1) t10(1) t11(1) MIN SCLK high after DRDY/DOUT goes low to activate Standby mode MAX UNITS 0 8.272 ms Standby mode activation time 8.272 8.304 ms Data ready after exiting Standby mode 27.7 28.1 ms (2) Values given for fCLK = 2MHz. For different fCLK frequencies, scale proportional to CLK period. Figure 28.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 APPLICATIONS INFORMATION GENERAL RECOMMENDATIONS The ADS1224 is a high-resolution A/D converter. Achieving optimal device performance requires careful attention to the support circuitry and printed circuit board (PCB) design. Figure 30 shows the basic connections for the ADS1224. As with any precision circuit, be sure to use good supply bypassing capacitor techniques.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 MULTICHANNEL SYSTEMS Multiple ADS1224s can be operated in parallel to measure multiple input signals. Figure 31 shows an example of an eight-channel system. For simplicity, the supplies and reference circuitry are not shown. The same CLK signal should be applied to all devices. To synchronize the ADS1224s, connect the same SCLK signal to all devices. Then place all the devices in Standby mode.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 VESSEL WEIGHING WITH FOUR LOAD CELLS In vessel weighing systems, four load cells are frequently employed to measure the weight of the vessel and its contents. The output of the load cells are usually combined in an external summing junction box that balances the load cells’ sensitivities for accuracy. The four differential inputs of the ADS1224 allow for direct measurement of the four load cells individually.
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www.ti.com SBAS286C − JUNE 2003 − REVISED JANUARY 2009 Revision History DATE 12/2/08 REV PAGE SECTION DESCRIPTION 9 Analog Input Measurement with the Input Buffer Added last sentence to first paragraph describing standby mode. 15 Standby Mode Added last sentence to first paragraph describing standby mode. C NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 30-Jan-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADS1224IPWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 ADS1224IPWT TSSOP PW 20 250 180.0 16.4 6.95 7.1 1.6 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 30-Jan-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS1224IPWR TSSOP PW 20 2000 346.0 346.0 33.0 ADS1224IPWT TSSOP PW 20 250 190.5 212.7 31.
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MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADS1224IPWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 ADS1224IPWT TSSOP PW 20 250 180.0 16.4 6.95 7.1 1.6 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS1224IPWR TSSOP PW 20 2000 367.0 367.0 38.0 ADS1224IPWT TSSOP PW 20 250 210.0 185.0 35.
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