Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External TSSOP 28

FEATURES DESCRIPTION

APPLICATIONS

Input

Mux

DS ADC

REFP REFN

PGA

Gain=

1,2,64,or128

CAP DVDD

DGND

AGNDA1/TEMP

(1)

NOTE:(1)A1forADS1234,TEMPforADS1232.

AINP1

AINN1

AINP2

AINN2

AINP3

AINN3

AINP4

AINN4

ADS1234

Only

SCLK

SPEED

DRDY/DOUT

PDWN

GAIN[1:0]

AVDD

CAP

ExternalOscillator

InternalOscillator

CLKIN/XTAL1

XTAL2

ADS1232

ADS1234

SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008

www.ti.com

24-Bit Analog-to-Digital Converter

For Bridge Sensors

• Complete Front-End for Bridge Sensors

The ADS1232 and ADS1234 are precision 24-bit

analog-to-digital converters (ADCs). With an onboard,

• Up to 23.5 Effective Bits

low-noise programmable gain amplifier (PGA),

• Onboard, Low-Noise PGA

precision delta-sigma ADC and internal oscillator, the

• RMS Noise:

ADS1232/4 provide a complete front-end solution for

17nV at 10SPS (PGA = 128)

bridge sensor applications including weigh scales,

44nV at 80SPS (PGA = 128)

strain gauges and pressure sensors.

• 19.2-Bit Noise-Free Resolution at Gain = 64

The input multiplexer accepts either two (ADS1232)

• Over 100dB Simultaneous 50Hz and 60Hz

or four (ADS1234) differential inputs. The ADS1232

also includes an onboard temperature sensor to

Rejection

monitor ambient temperature. The onboard, low-noise

• Flexible Clocking:

PGA has a selectable gain of 1, 2, 64, or 128

Low-Drift Onboard Oscillator ( ± 3%)

supporting a full-scale differential input of ± 2.5V,

Optional External Crystal

± 1.25V, ± 39mV, or ± 19.5mV. The delta-sigma ADC

• Selectable Gains of 1, 2, 64, and 128

has 23.5-bit effective resolution and is comprised of a

3rd-order modulator and 4th-order digital filter. Two

• Easy Ratiometric Measurements –

data rates are supported: 10SPS (with both 50Hz and

External Voltage Reference up to 5V

60Hz rejection) and 80SPS. The ADS1232/4 can be

• Selectable 10SPS or 80SPS Data Rates

clocked externally using an oscillator or a crystal.

• Two-Channel Differential Input with Built-In

There is also an internal oscillator available that

Temperature Sensor (ADS1232)

requires no external components. Offset calibration is

performed on-demand and the ADS1232/4 can be

• Four-Channel Differential Input (ADS1234)

put in a low-power standby mode or shut off

• Simple Serial Digital Interface

completely in power-down mode. All of the features of

• Supply Range: 2.7V to 5.3V

the ADS1232/4 are operated through simple

pin-driven control. There are no digital registers to

• – 40 ° C to +105 ° C Temperature Range

program in order to simplify software development.

Data are output over an easily-isolated serial

interface that connects directly to the MSP430 and

• Weigh Scales

other microcontrollers.

• Strain Gauges

The ADS1232 is available in a TSSOP-24 package

• Pressure Sensors

and the ADS1234 is in a TSSOP-28. Both are fully

• Industrial Process Control

specified from -40 ° C to +105 ° C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (39 pages)

PAGE 1
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 24-Bit Analog-to-Digital Converter For Bridge Sensors FEATURES DESCRIPTION 1 • • • • 2 • • • • • • • • • • • Complete Front-End for Bridge Sensors Up to 23.5 Effective Bits Onboard, Low-Noise PGA RMS Noise: 17nV at 10SPS (PGA = 128) 44nV at 80SPS (PGA = 128) 19.
PAGE 2
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 3
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 ELECTRICAL CHARACTERISTICS All specifications at TA = –40°C to +105°C, AVDD = DVDD = VREFP = +5V, and VREFN = AGND, unless otherwise noted. ADS1232, ADS1234 PARAMETER CONDITIONS MIN TYP MAX UNIT Analog Inputs Full-Scale Input Voltage (AINP – AINN) Common-Mode Input Range ±0.5VREF/Gain AINxP or AINxN with respect to GND, Gain = 1, 2 Gain = 64, 128 AGND – 0.1 Differential Input Current AVDD + 0.1 AGND + 1.
PAGE 4
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 ELECTRICAL CHARACTERISTICS (continued) All specifications at TA = –40°C to +105°C, AVDD = DVDD = VREFP = +5V, and VREFN = AGND, unless otherwise noted. ADS1232, ADS1234 PARAMETER CONDITIONS MIN TYP MAX UNIT Digital Logic Levels VIH 0.7 DVDD DVDD + 0.1 V VIL DGND 0.2 DVDD V VOH IOH = 1mA VOL IOL = 1mA Input Leakage DVDD – 0.4 V 0 < VIN < DVDD External Clock Input Frequency (fCLKIN) 0.2 4.
PAGE 5
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 NOISE PERFORMANCE The ADS1232/4 offer outstanding noise performance that can be optimized for a given full-scale range using the on-chip programmable gain amplifier. Table 1 through Table 4 summarize the typical noise performance with inputs shorted externally for different gains, data rates, and voltage reference values. The RMS and Peak-to-Peak noise are referred to the input.
PAGE 6
ADS1232 ADS1234 www.ti.
PAGE 7
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 PIN DESCRIPTIONS TERMINAL NAME ADS1232 ADS1234 ANALOG/DIGITAL INPUT/OUTPUT DVDD 1 1 Digital Digital Power Supply: 2.7V to 5.3V DGND 2 2 Digital Digital Ground CLKIN/ XTAL1 3 3 Digital/Digital Input XTAL2 4 4 Digital External crystal connection DGND 5 5 Digital Digital Ground DGND 6 6 Digital Digital Ground TEMP 7 – Digital Input DESCRIPTION External Clock Input: typically 4.9152MHz.
PAGE 8
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 TYPICAL CHARACTERISTICS At TA = +25°C, AVDD = DVDD = VREFP = 5V, and VREFN = AGND, unless otherwise noted. NOISE PLOT NOISE PLOT 25 6 PGA = 1 Data Rate = 10SPS 5 20 15 3 Output Code (LSB) Output Code (LSB) 4 2 1 −1 −2 −3 10 5 0 −5 −10 −4 −15 −5 −20 PGA = 128 Data Rate = 10SPS −25 −6 0 200 400 600 800 0 1000 200 Figure 1. Figure 2.
PAGE 9
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, AVDD = DVDD = VREFP = 5V, and VREFN = AGND, unless otherwise noted. NOISE HISTOGRAM NOISE HISTOGRAM 50 180 PGA = 1 Data Rate = 80SPS 45 40 140 35 120 Occurance 100 80 30 25 20 60 15 40 10 20 5 0 0 −12 −6 0 6 −40 12 Figure 8. OFFSET DRIFT (+25°C to +105°C) 30 20 Offset Drift (nV/°C) Offset Drift (nV/°C) Figure 9. Figure 10.
PAGE 10
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, AVDD = DVDD = VREFP = 5V, and VREFN = AGND, unless otherwise noted. OFFSET DRIFT (–40°C to +25°C) OFFSET DRIFT (+25°C to +105°C) 30 20 PGA = 128 Data Rate = 10SPS 90 Samples from 3 Lots 25 16 14 Counts 20 Counts PGA = 128 Data Rate = 10SPS 90 Samples from 3 Lots 18 15 10 12 10 8 6 4 5 2 0 Offset Drift (nV/°C) Offset Drift (nV/°C) Figure 13. Figure 14.
PAGE 11
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, AVDD = DVDD = VREFP = 5V, and VREFN = AGND, unless otherwise noted. NOISE vs INPUT SIGNAL NOISE vs INPUT SIGNAL 1000 PGA = 1 Data Rate = 10SPS 800 40 700 35 500 400 300 30 25 20 15 200 10 100 5 0 0.5 1.0 1.5 2.0 0 −19 2.5 −14.25 −9.5 −4.75 0 4.75 9.5 VIN (V) VIN (mV) Figure 19. Figure 20.
PAGE 12
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, AVDD = DVDD = VREFP = 5V, and VREFN = AGND, unless otherwise noted. DATA RATE vs TEMPERATURE 10.06 SPEED = LOW CLKIN/XTAL1 = LOW (Internal Oscillator) Data Rate (SPS) 10.01 9.96 9.91 9.86 −50 −30 −10 10 30 50 70 90 110 Temperature (_C) Figure 25.
PAGE 13
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 OVERVIEW TEMPERATURE SENSOR (ADS1232 only) The ADS1232 and ADS1234 are highly integrated, 24-bit ADCs that include an input multiplexer, low-noise PGA, third-order delta-sigma (ΔΣ) modulator, and fourth-order digital filter.
PAGE 14
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 LOW-NOISE PGA Bypass Capacitor The ADS1232/4 features a low-drift, low-noise PGA that provides a complete front-end solution for bridge sensors. A simplified diagram of the PGA is shown in Figure 27. It consists of two chopper-stabilized amplifiers (A1 and A2) and three accurately-matched resistors (R1, RF1, and RF2), which construct a differential front-end stage with a gain of 64, followed by gain stage A3.
PAGE 15
ADS1232 ADS1234 www.ti.com Z EFF + SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 1 + 500MW (2)(76.8kHz)(13fF) CLKIN/XTAL1 Crystal Oscillator CLK_DETECT VREFP VREFN Internal Oscillator XTAL2 AVDD S0 EN S1 S MUX AVDD To ADC ESD Protection CBUF ZEFF = 500MΩ(1) (1) f MOD = 76.8kHz Figure 28. Simplified Reference Input Circuitry ESD diodes protect the reference inputs.
PAGE 16
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 FREQUENCY RESPONSE 4 The ADS1232/4 use a sinc digital filter with the frequency response (fCLK = 4.9152MHz) shown in Figure 30. The frequency response repeats at multiples of the modulator sampling frequency of 76.8kHz. The overall response is that of a low-pass filter with a –3dB cutoff frequency of 3.32Hz with the SPEED pin tied low (10SPS data rate) and 11.64Hz with the SPEED pin tied high (80SPS data rate).
PAGE 17
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 SETTLING TIME After changing the input multiplexer, the first data are fully settled. In both the ADS1232/4, the digital filter is allowed to settle after toggling either the A1 or A0 pin. Toggling any of these digital pins will hold the DRDY/DOUT line high until the digital filter is fully settled.
PAGE 18
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 DATA RATE DATA READY/DATA OUTPUT (DRDY/DOUT) The ADS1232/4 data rate is set by the SPEED pin, as shown in Table 7. When SPEED is low, the data rate is nominally 10SPS. This data rate provides the lowest noise, and also has excellent rejection of both 50Hz and 60Hz line-cycle interference. For applications requiring fast data rates, setting SPEED high selects a data rate of nominally 80SPS.
PAGE 19
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 DATA RETRIEVAL indicating that new data are being updated. To avoid having DRDY/DOUT remain in the state of the last bit, the user can shift SCLK to force DRDY/DOUT high, as shown in Figure 35. This technique is useful when a host controlling the device is polling DRDY/DOUT to determine when data are ready. The ADS1232/4 continuously convert the analog input signal.
PAGE 20
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 OFFSET CALIBRATION When the calibration is completed, DRDY/DOUT goes low, indicating that new data are ready. The analog input pins are disconnected within the ADC and the appropriate signal is applied internally to perform the calibration. The first conversion after a calibration is fully settled and valid for use. The offset calibration takes exactly the same time as specified in (t8) right after the falling edge of the 26th SCLK.
PAGE 21
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 STANDBY MODE Standby mode dramatically reduces power consumption by shutting down most of the circuitry. In Standby mode, the entire analog circuitry is powered down and only the clock source circuitry is awake to reduce the wake-up time from the Standby mode. To enter Standby mode, simply hold SCLK high after DRDY/DOUT goes low; see Figure 37.
PAGE 22
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 STANDBY MODE WITH OFFSET-CALIBRATION Offset-calibration can be set to run immediately after exiting Standby mode. This is useful when the ADS1232/4 is put in Standby mode for long periods of time, and offset-calibration is desired afterwards to compensate for temperature or supply voltage changes. To force an offset-calibration with Standby mode, shift 25 SCLKs and take the SCLK pin high to enter Standby mode.
PAGE 23
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 POWER-UP SEQUENCE AVDD DVDD When powering up the ADS1232/34, AVDD and DVDD must be powered up before the PDWN pin goes high, as shown in Figure 39. If PDWN is not controlled by a microprocessor, a simple RC delay circuit must be implemented, as shown in Figure 40. PDWN ³10ms Figure 39.
PAGE 24
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 APPLICATION EXAMPLES Therefore: Weigh-Scale System Noise−Free Counts + ǒ2 (18.4)1)Ǔ 10mV + 177, 385 39mV ǒ Figure 42 shows a typical ADS1232 hook-up as part of a weigh-scale system. In this setup, the ADS1232 is configured to channel one input with a gain of 128 at a 10SPS data rate. Note that the internal oscillator is used by grounding the CLKIN/XTAL1 pin. The user can also apply either a 4.
PAGE 25
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 5V 3V 0.1mF 18 1 AVDD VDD DVDD 20 ADS1232 16 REFP 19 GAIN0 Gain = 128 9 CAP 24 DRDY/DOUT 0.1mF 10 CAP 23 SCLK + - GAIN1 22 PDWN 11 AINP1 12 MSP430x4xx or Other Microprocessor 4 XTAL2 AINN1 14 13 AINP2 CLKIN/XTAL1 AINN2 SPEED 3 21 8 A0 7 15 REFN TEMP AGND 17 GND DGND 2, 5, 6 Figure 42. Weigh Scale Application 5V 3V 0.1mF R1 50kW 18 1 AVDD ADS1232 16 REF1004- 2.5V 9 0.
PAGE 26
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 5V 3V R1 50kW 0.1mF 18 1 AVDD 19 ADS1232 16 9 REF1004- 2.5V REFP GAIN0 GAIN1 DRDY/DOUT 10 CAP SCLK PDWN 11 1 12 Thermocouple Type k 14 13 20 Gain = 2 CAP 0.1mF 2 VDD DVDD AINP1 XTAL2 24 23 22 4 MSP430x4xx or Other Microprocessor AINN1 AINP2 CLKIN/XTAL1 AINN2 SPEED A0 3 21 8 7 15 REFN AGND 17 TEMP DGND 2, 5, 6 GND Figure 44.
PAGE 27
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 RTDs and Thermistors Figure 45 shows a typical schematic for a style 2 (three-wire) RTD application. R1 and R2 are used to excite the RTD as well as establish the common-mode voltage of the ADS1232 PGA. By using both differential channels of the ADS1232, the temperature change in lead resistance, RL, can be eliminated. This condition is accomplished by using the following formula: (AINP1 – AINN1) – 2(AINP2 – AINN2). 5V 3V 0.
PAGE 28
ADS1232 ADS1234 www.ti.
PAGE 29
ADS1232 ADS1234 www.ti.com SBAS350F – JUNE 2005 – REVISED FEBRUARY 2008 Revision History Changes from Revision E (October 2007) to Revision F ............................................................................................... Page • • Changed AVDD to deltaV in Common-Mode Rejection section in Electrical Characteristics table....................................... 3 Changed AVDD to deltaV in Power-Supply Rejection section in Electrical Characteristics table ....................................
PAGE 30
PACKAGE OPTION ADDENDUM www.ti.
PAGE 31
PACKAGE OPTION ADDENDUM www.ti.com 21-May-2010 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
PAGE 32
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADS1232IPWR TSSOP PW 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1 ADS1234IPWR TSSOP PW 28 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.
PAGE 33
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS1232IPWR TSSOP PW 24 2000 367.0 367.0 38.0 ADS1234IPWR TSSOP PW 28 2000 367.0 367.0 38.
PAGE 34
PAGE 35
PAGE 36
PAGE 37
PAGE 38
PAGE 39
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.