Datasheet

R
BIAS
RBIAS
AGND
ADS1675
ADS1675
SBAS416D –DECEMBER 2008–REVISED AUGUST 2010 www.ti.com
ANALOG POWER DISSIPATION including the voltage reference. To minimize the
digital current during power down, stop the clock
An external resistor connected between the RBIAS
signal supplied to the CLK input. Make sure to allow
pin and the analog ground sets the analog current
time for the reference to start up after exiting
level, as shown in Figure 51. The current is inversely
power-down mode.
proportional to the resistor value. Figure 24 to
Figure 26 (in the Typical Characteristics) show power After the reference has stabilized, allow for the
and typical performance at values of R
BIAS
for modulator and digital filter to settle before retrieving
different CLK frequencies. Notice that the analog data.
current can be reduced when using a slower
frequency CLK input because the modulator has
POWER SUPPLIES
more time to settle. Avoid adding any capacitance in
Two supplies are used on the ADS1675: analog
parallel to R
BIAS
, because this additional capacitance
(AVDD) and digital (DVDD). Each supply must be
interferes with the internal circuitry used to set the
suitably bypassed to achieve the best performance. It
biasing.
is recommended that a 1mF and 0.1mF ceramic
capacitor be placed as close to each supply pin as
possible. AVDD must be very clean and stable in
order to achieve optimum performance from the
device.
Connect each supply-pin bypass capacitor to the
associated ground. Each main supply bus should also
be bypassed with a bank of capacitors from 47mF to
0.1mF. Figure 52 illustrates the recommended method
for ADS1675 power-supply decoupling.
Figure 51. External Resistor Used to Set Analog
Power Dissipation (Depends on f
CLK
) Power-supply pins 53 and 54 are used to drive the
internal clock supply circuits and, as such, are very
noisy. It is highly recommended that the traces from
POWER DOWN (PDWN)
these pins not be shared or run close to any of the
adjacent AVDD or AGND pins of the ADS1675.
When not in use, the ADS1675 can be powered down
These pins should be well-decoupled, using a 0.1mF
by taking the PDWN pin low. All circuitry shuts down,
ceramic capacitor close to the pins, and immediately
terminated into power and ground planes.
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