Datasheet

5020 100 150 200
In ueput F eqr ncy (MHz)
SamplingFrequency(MSPS)
SNR(dBFS)
250 300 350 400
30
70
40
50
60
80
125
69686766 70
20
90
100
110
120
65
71
71
71
71
70.5
70.5
70.5
70
70
70
69.5
69.5
69.5
69
69
69
68
68
67
66
67
5020 100 150 200
In ueput F eqr ncy (MHz)
SamplingFrequency(MSPS)
SNR(dBFS)
250 300 350 400
30
70
40
50
60
80
125
6665.56564.5 66.5
20
90
100
110
120
64
67
67
67
67
66.5
66.5
66.5
66
66
66
65.5
65.5
65
64.5
64
ADS4122, ADS4125
ADS4142, ADS4145
www.ti.com SBAS520A –FEBRUARY 2011– REVISED MARCH 2011
TYPICAL CHARACTERISTICS: CONTOUR (continued)
At +25°C, AVDD = 1.8V, DRVDD = 1.8V, maximum rated sampling frequency, sine wave input clock, 1.5V
PP
differential clock
amplitude, 50% clock duty cycle, –1dBFS differential analog input, 0dB gain, low-latency mode, DDR LVDS output interface,
and 32k-point FFT, unless otherwise noted.
ADS412x SNR ACROSS INPUT AND SAMPLING FREQUENCIES (0dB Gain)
Figure 99.
ADS412x SNR ACROSS INPUT AND SAMPLING FREQUENCIES (6dB Gain)
Figure 100.
Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback 57
Product Folder Link(s): ADS4122 ADS4125 ADS4142 ADS4145