Datasheet

INP
INM
10W
100W
3pF
3pF
100W
C
1pF
BOND
C
2pF
SAMP
RCRFilter
Samp il ng
Switch
R
15
ON
W
R
15
ON
W
R
15
ON
W
L
2nH
PKG
L
2nH
PKG
R
200W
ESR
C
1pF
PAR2
C
0.5pF
PAR1
C
2pF
SAMP
Samp il ng
Capacitor
Samp il ng
Switch
Sampling
Capacitor
C
1pF
PAR2
C
1pF
BOND
R
200W
ESR
ADS4122, ADS4125
ADS4142, ADS4145
SBAS520A –FEBRUARY 2011– REVISED MARCH 2011 www.ti.com
APPLICATION INFORMATION
THEORY OF OPERATION
The ADS412x/4x are lower sampling speed members of the ADS41xx family of ultralow power analog-to-digital
converters (ADCs). The conversion process is initiated by a rising edge of the external input clock and the analog
input signal is sampled. The sampled signal is sequentially converted by a series of small resolution stages, with
the outputs combined in a digital correction logic block. At every clock edge the sample propagates through the
pipeline, resulting in a data latency of 10 clock cycles. The output is available as 14-bit data or 12-bit data, in
DDR LVDS mode or CMOS mode, and coded in either straight offset binary or binary twos complement format.
ANALOG INPUT
The analog input consists of a switched-capacitor-based, differential, sample-and-hold architecture. This
differential topology results in very good ac performance even for high input frequencies at high sampling rates.
The INP and INM pins must be externally biased around a common-mode voltage of 0.95V, available on the
VCM pin. For a full-scale differential input, each input INP and INM pin must swing symmetrically between (VCM
+ 0.5V) and (VCM – 0.5V), resulting in a 2V
PP
differential input swing. The input sampling circuit has a high 3dB
bandwidth that extends up to 550MHz (measured from the input pins to the sampled voltage). Figure 101 shows
an equivalent circuit for the analog input.
Figure 101. Analog Input Equivalent Circuit
Drive Circuit Requirements
For optimum performance, the analog inputs must be driven differentially. This technique improves the
common-mode noise immunity and even-order harmonic rejection. A 5Ω to 15Ω resistor in series with each input
pin is recommended to damp out ringing caused by package parasitics. It is also necessary to present low
impedance (less than 50Ω) for the common-mode switching currents. This impedance can be achieved by using
two resistors from each input terminated to the common-mode voltage (VCM).
Note that the device includes an internal R-C filter from each input to ground. The purpose of this filter is to
absorb the glitches caused by the opening and closing of the sampling capacitors. The cutoff frequency of the
R-C filter involves a trade-off. A lower cutoff frequency (larger C) absorbs glitches better, but also reduces the
input bandwidth and the maximum input frequency that can be supported. On the other hand, with no internal
R-C filter, high input frequency can be supported but now the sampling glitches must be supplied by the external
driving circuit. The inductance of the package bond wires limits the ability of the external driving circuit to support
the sampling glitches.
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Product Folder Link(s): ADS4122 ADS4125 ADS4142 ADS4145