Datasheet

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DESCRIPTION OF SERIAL REGISTERS
ADS6245 , ADS6244
ADS6243 , ADS6242
SLAS542A – MAY 2007 – REVISED JULY 2007
Table 14. Serial Register A
REGISTER
BITS
ADDRESS
A4 - A0 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
<REF> <PDN>
<PDN CHB> <PDN CHA>
<RST> INTERNAL GLOBAL
00 0 0 0 0 0 POWER POWER 0
S/W RESET OR POWER
DOWN CHB DOWN CH A
EXTERNAL DOWN
D0 - D4 Power down modes
D0 <PDN GLOBAL>
0 Normal operation
1 Global power down, including all channels ADCs, internal references, internal PLL and output
buffers
D2 <PDN CH A>
0 CH A powered up
1 CH A ADC powered down
D3 <PDN CH B>
0 CH B powered up
1 CH B ADC powered down
D5 <REF> Reference
0 Internal reference enabled
1 External reference enabled
D10 <RST>
1 Software reset applied – resets all internal registers and self-clears to 0
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Product Folder Link(s): ADS6245 ADS6244 ADS6243 ADS6242