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f
IN
− Input Frequency − MHz
76
78
80
82
84
86
88
90
92
94
96
10 30 50 70 90 110 130 150 170 190 210 230
SFDR − dBc
G061
Input adjusted to get −1dBFS input
6 dB
2 dB
4 dB
3 dB
5 dB
0 dB
1 dB
f
IN
− Input Frequency − MHz
65
66
67
68
69
70
71
72
73
74
75
20 40 60 80 100 120 140 160 180 200 220
SINAD − dBFS
G062
2 dB
5 dB
1 dB
0 dB
3 dB
3.5 dB
4 dB
6 dB
SNR − dBFS
72
73
74
75
76
77
78
AV
DD
− Supply Voltage − V
82
84
86
88
90
92
94
3.0 3.1 3.2 3.3 3.4 3.5 3.6
SFDR − dBc
G063
SNR
SFDR
f
IN
= 50.1 MHz
LV
DD
= 3.3 V
SNR − dBFS
70
71
72
73
74
75
76
LV
DD
− Supply Voltage − V
86
87
88
89
90
91
92
3.0 3.1 3.2 3.3 3.4 3.5 3.6
SFDR − dBc
G064
f
IN
= 50.1 MHz
AV
DD
= 3.3 V
SNR
SFDR
SNR − dBFS
73
74
75
76
77
78
79
T − Temperature − °C
84
86
88
90
92
94
96
−40 −20 0 20 40 60 80
SFDR − dBc
G065
f
IN
= 50.1 MHz
SNR
SFDR
50
55
60
65
70
75
80
85
90
Input Amplitude − dBFS
30
40
50
60
70
80
90
100
110
−60 −50 −40 −30 −20 −10 0
f
IN
= 20 MHz
SFDR − dBc, dBFS
G066
SNR − dBFS
SFDR (dBc)
SFDR (dBFS)
SNR (dBFS)
ADS6245 , ADS6244
ADS6243 , ADS6242
SLAS542A – MAY 2007 – REVISED JULY 2007
TYPICAL CHARACTERISTICS - ADS6242 (F
s
= 65 MSPS) (continued)
All plots are at 25 ° C, AVDD = LVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 V
PP
differential
clock amplitude, 50% clock duty cycle, – 1 dBFS differential analog input, internal reference mode, 0 dB gain (unless
otherwise noted)
SFDR vs INPUT FREQUENCY ACROSS GAINS SINAD vs INPUT FREQUENCY ACROSS GAINS
Figure 66. Figure 67.
PERFORMANCE vs AVDD PERFORMANCE vs LVDD
Figure 68. Figure 69.
PERFORMANCE vs TEMPERATURE PERFORMANCE vs INPUT AMPLITUDE
Figure 70. Figure 71.
Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 37
Product Folder Link(s): ADS6245 ADS6244 ADS6243 ADS6242