Datasheet

Reference
INA_P
INA_M
CLKP
CLKM
VCM
SEN
PDN
SDATA
CFG1
SCLK
CFG2
RESET
C
FG3
CFG4
DCLKP
DCLKM
ADS6425
SHA
FCLKP
FCLKM
INB_P
INB_M
SHA
SHA
SHA
INC_P
INC_M
IND_P
IND_M
REFP
RE
FM
PLL
BIT Clock
FRAME Clock
DA0_P
DA1_P
DA0_M
DA1_M
DB0_P
DB1_P
DB0_M
DB1_M
DC0_P
DC1_P
DC0_M
DC1_M
DD0_P
DD1_P
DD0_M
DD1_M
AVDD AG
ND
LVDD
CAP
LGND
Serial
Interface
Parallel
Interface
12-Bit
ADC
12-Bit
ADC
12-Bit
ADC
12-Bit
ADC
Digital
Encoder
and
Serializer
Digital
Encoder
and
Serializer
Digital
Encoder
and
Serializer
Digital
Encoder
and
Serializer
B0199-02
ADS6425
SLWS197B – MARCH 2007 – REVISED JUNE 2009 ......................................................................................................................................................... www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
PACKAGE/ORDERING INFORMATION
(1)
SPECIFIED TRANSPORT
PACKAGE PACKAGE
PRODUCT PACKAGE-LEAD TEMPERATURE ORDERING NUMBER MEDIA,
DESIGNATOR MARKING
RANGE QUANTITY
ADS6425IRGCT 250, Tape/reel
ADS6425 QFN-64
(2)
RGC – 40 ° C to 85 ° C AZ6425
ADS6425IRGCR 2000, Tape/reel
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com .
(2) For thermal pad size on the package, see the mechanical drawings at the end of this data sheet. θ
JA
= 23.17 ° C/W (0 LFM air flow), θ
JC
= 22.1 ° C/W when used with 2 oz. copper trace and pad soldered directly to a JEDEC standard four layer 3 in. x 3 in. PCB.
2 Submit Documentation Feedback Copyright © 2007 – 2009, Texas Instruments Incorporated
Product Folder Link(s): ADS6425