Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ABSOLUTE MAXIMUM RATINGS
- RECOMMENDED OPERATING CONDITIONS
- ELECTRICAL CHARACTERISTICS
- ELECTRICAL CHARACTERISTICS
- DIGITAL CHARACTERISTICS
- TIMING SPECIFICATIONS
- SERIAL INTERFACE TIMING CHARACTERISTICS
- RESET TIMING
- TYPICAL CHARACTERISTICS
- APPLICATION INFORMATION
- THEORY OF OPERATION
- ANALOG INPUT
- INPUT COMMON MODE
- REFERENCE
- COARSE GAIN AND PROGRAMMABLE FINE GAIN
- CLOCK INPUT
- CLOCK BUFFER GAIN
- POWER DOWN MODES
- POWER SUPPLY SEQUENCING
- DIGITAL OUTPUT INTERFACE
- OUTPUT BIT ORDER
- MSB/LSB FIRST
- OUTPUT DATA FORMATS
- LVDS CURRENT CONTROL
- LVDS INTERNAL TERMINATION
- CAPTURE TEST PATTERNS
- OUTPUT TIMINGS AT LOWER SAMPLING FREQUENCIES
- DEFINITION OF SPECIFICATIONS
PSRR + 20Log10
DVout
DVsup
, expressed in dBc
(7)
CMRR + 20Log10
DVout
DVcm_in
, expressed in dBc
(8)
ADS6425
SLWS197B – MARCH 2007 – REVISED JUNE 2009 .........................................................................................................................................................
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Spurious-Free Dynamic Range (SFDR) – The ratio of the power of the fundamental to the highest other
spectral component (either spur or harmonic). SFDR is typically given in units of dBc (dB to carrier).
Two-Tone Intermodulation Distortion – IMD3 is the ratio of the power of the fundamental (at frequencies f1
and f2) to the power of the worst spectral component at either frequency 2f1 – f2 or 2f2 – f1. IMD3 is either given in
units of dBc (dB to carrier) when the absolute power of the fundamental is used as the reference, or dBFS (dB to
full scale) when the power of the fundamental is extrapolated to the converter ’ s full-scale range.
DC Power Supply Rejection Ratio (DC PSRR) – The DC PSSR is the ratio of the change in offset error to a
change in analog supply voltage. The DC PSRR is typically given in units of mV/V.
AC Power Supply Rejection Ratio (AC PSRR) – AC PSRR is the measure of rejection of variations in the
supply voltage by the ADC. If Δ Vsup is the change in supply voltage and Δ Vout is the resultant change of the
ADC output code (referred to the input), then
Voltage Overload Recovery – The number of clock cycles taken to recover to less than 1% error for a 6 dB
overload on the analog inputs. A 6 dBFS sine wave input at Nyquist frequency is used as the test stimulus.
Common Mode Rejection Ratio (CMRR) – CMRR is the measure of rejection of variations in the analog input
common-mode by the ADC. If Δ Vcm_in is the change in the common-mode voltage of the input pins and Δ Vout
is the resultant change of the ADC output code (referred to the input), then
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