Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External TSSOP 16

FEATURES APPLICATIONS

DESCRIPTION

REF

+IN

REF+

SDI

SCLK

SDO

CDAC

SAR

COMPARATOR

OUTPUT

LATCH

and

3-STATE

DRIVER

CONVERSION

and

CONTROL

LOGIC

-IN

+IN1

+IN0

COM

OSC

ADS7280 ADS7279

FS/CS

CONVST

EOC/INT/CDI

ADS7279

ADS7280

www.ti.com

............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009

LOW-POWER, 14-BIT, 1MHz, SINGLE/DUAL UNIPOLAR INPUT,

ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL INTERFACE

• Communications

• 2.7V to 5.5V Analog Supply, Low Power:

• Transducer Interface

– 13.7mW (1MHz, +VA = 3V, +VBD = 1.8V)

• Medical Instruments

• 1MHz Sampling Rate 3V ≤ +VA ≤ 5.5V,

• Magnetometers

900kHz Sampling Rate 2.7V ≤ +VA ≤ 3V

• Industrial Process Control

• Excellent DC Performance:

• Data Acquisition Systems

– ± 0.4LSB Typ, ± 1.0LSB Max INL

• Automatic Test Equipment

– ± 0.4LSB Typ, ± 1.0LSB Max DNL

– ± 0.8mV Max Offset Error at 3V

– ± 1.25mV Max Offset Error at 5V

The ADS7279 is a low-power, 14-bit, 1MSPS

• Excellent AC Performance at f

= 10kHz with

analog-to-digital converter (ADC) with a unipolar

85.9dB SNR, 105.3dB SFDR, – 100.1dB THD

input. The device includes a 14-bit, capacitor-based

successive approximation register (SAR) ADC with

• Built-In Conversion Clock (CCLK)

inherent sample-and-hold.

• 1.65V to 5.5V I/O Supply:

The ADS7280 is based on the same core and

– SPI™/DSP-Compatible Serial Interface

includes a 2-to-1 input MUX with a programmable

– SCLK up to 50MHz

TAG bit output option. Both the ADS7279 and

• Comprehensive Power-Down Modes:

ADS7280 offer a high-speed, wide voltage serial

interface, and are capable of daisy-chain mode

– Deep Power-Down

operation when multiple converters are used.

– Nap Power-Down

These converters are available in 4 × 4 QFN and

– Auto Nap Power-Down

TSSOP-16 packages, and are fully specified for

• Unipolar Input Range: 0V to V

REF

operation over the industrial – 40 ° C to +85 ° C

• Software Reset

temperature range.

• Global CONVST (Independent of CS)

Low Power, High-Speed SAR Converter Family

• Programmable Status/Polarity EOC/ INT

Type/Speed 500 kSPS 1 MSPS

• 4 × 4 QFN-16 and TSSOP-16 Packages

Single ADS8327 ADS8329

• Multi-Chip Daisy-Chain Mode

16-bit single-ended

Dual ADS8328 ADS8330

• Programmable TAG Bit Output

Single ADS7279

• Auto/Manual Channel Select Mode (ADS7280)

14-bit single-ended

Dual ADS7280

Single ADS7229

12-bit single-ended

Dual ADS7230

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 SPI is a trademark of Motorola, Inc.

3 All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (50 pages)

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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 LOW-POWER, 14-BIT, 1MHz, SINGLE/DUAL UNIPOLAR INPUT, ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL INTERFACE FEATURES APPLICATIONS • 2.7V to 5.5V Analog Supply, Low Power: – 13.7mW (1MHz, +VA = 3V, +VBD = 1.8V) • 1MHz Sampling Rate 3V ≤ +VA ≤ 5.5V, 900kHz Sampling Rate 2.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 ELECTRICAL CHARACTERISTICS At TA = –40°C to +85°C, +VA = 4.5V to 5.5V, +VBD = +1.65V to +5.5V, VREF = 5V, and fSAMPLE = 1MHz, unless otherwise noted.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS (continued) At TA = –40°C to +85°C, +VA = 4.5V to 5.5V, +VBD = +1.65V to +5.5V, VREF = 5V, and fSAMPLE = 1MHz, unless otherwise noted.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 ELECTRICAL CHARACTERISTICS At TA = –40°C to +85°C, +VA = 2.7V to 3.6V, +VBD = 1.65V to 1.5x(+VA), VREF = 2.5V, fSAMPLE = 1MHz for 3V ≤ +VA ≤ 3.6V, and fSAMPLE = 900kHz for 3V < +VA ≤ 2.7V using external clock, unless otherwise noted.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS (continued) At TA = –40°C to +85°C, +VA = 2.7V to 3.6V, +VBD = 1.65V to 1.5x(+VA), VREF = 2.5V, fSAMPLE = 1MHz for 3V ≤ +VA ≤ 3.6V, and fSAMPLE = 900kHz for 3V < +VA ≤ 2.7V using external clock, unless otherwise noted.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 ELECTRICAL CHARACTERISTICS (continued) At TA = –40°C to +85°C, +VA = 2.7V to 3.6V, +VBD = 1.65V to 1.5x(+VA), VREF = 2.5V, fSAMPLE = 1MHz for 3V ≤ +VA ≤ 3.6V, and fSAMPLE = 900kHz for 3V < +VA ≤ 2.7V using external clock, unless otherwise noted.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com TIMING CHARACTERISTICS (1) (2): 5V All specifications typical at –40°C to +85°C and +VA = +VBD = 5V, unless otherwise noted. ADS7279, ADS7280 PARAMETER fCCLK Frequency, conversion clock, CCLK MIN External, fCCLK = 1/2 fSCLK 0.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 TIMING CHARACTERISTICS (1) (2) : 1.8V All specifications typical at –40°C to 85°C, +VA = 2.7 V, and +VBD = 1.8V, unless otherwise noted. ADS7279, ADS7280 PARAMETER fCCLK Frequency, conversion clock, CCLK MIN TYP MAX External, 3V ≤ +VA ≤ 3.6V, fCCLK = 1/2 fSCLK 0.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 ADS7279 Terminal Functions NO. QFN TSSOP I/O AGND NAME 15 5 — Analog ground DESCRIPTION BDGND 8 14 — Interface ground CONVST 3 9 I Freezes sample-and-hold, starts conversion with next rising edge of internal clock Status output.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.
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ADS7279 ADS7280 www.ti.com ...............................................................................................................................................................
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 TYPICAL CHARACTERISTICS At –40°C to +85°C, VREF [(REF+) – (REF–)] = 5V when +VA = +VBD = 5V or VREF [(REF+) – (REF–)] = 2.5V when +VA = +VBD = 3V, fSCLK = 42MHz, or VREF = 2.5 when +VA = +VBD = 2.7V, fSCLK = 37.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) At –40°C to +85°C, VREF [(REF+) – (REF–)] = 5V when +VA = +VBD = 5V or VREF [(REF+) – (REF–)] = 2.5V when +VA = +VBD = 3V, fSCLK = 42MHz, or VREF = 2.5 when +VA = +VBD = 2.7V, fSCLK = 37.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 TYPICAL CHARACTERISTICS (continued) At –40°C to +85°C, VREF [(REF+) – (REF–)] = 5V when +VA = +VBD = 5V or VREF [(REF+) – (REF–)] = 2.5V when +VA = +VBD = 3V, fSCLK = 42MHz, or VREF = 2.5 when +VA = +VBD = 2.7V, fSCLK = 37.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) At –40°C to +85°C, VREF [(REF+) – (REF–)] = 5V when +VA = +VBD = 5V or VREF [(REF+) – (REF–)] = 2.5V when +VA = +VBD = 3V, fSCLK = 42MHz, or VREF = 2.5 when +VA = +VBD = 2.7V, fSCLK = 37.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 TYPICAL CHARACTERISTICS (continued) At –40°C to +85°C, VREF [(REF+) – (REF–)] = 5V when +VA = +VBD = 5V or VREF [(REF+) – (REF–)] = 2.5V when +VA = +VBD = 3V, fSCLK = 42MHz, or VREF = 2.5 when +VA = +VBD = 2.7V, fSCLK = 37.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) At –40°C to +85°C, VREF [(REF+) – (REF–)] = 5V when +VA = +VBD = 5V or VREF [(REF+) – (REF–)] = 2.5V when +VA = +VBD = 3V, fSCLK = 42MHz, or VREF = 2.5 when +VA = +VBD = 2.7V, fSCLK = 37.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 TYPICAL CHARACTERISTICS (continued) At –40°C to +85°C, VREF [(REF+) – (REF–)] = 5V when +VA = +VBD = 5V or VREF [(REF+) – (REF–)] = 2.5V when +VA = +VBD = 3V, fSCLK = 42MHz, or VREF = 2.5 when +VA = +VBD = 2.7V, fSCLK = 37.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) At –40°C to +85°C, VREF [(REF+) – (REF–)] = 5V when +VA = +VBD = 5V or VREF [(REF+) – (REF–)] = 2.5V when +VA = +VBD = 3V, fSCLK = 42MHz, or VREF = 2.5 when +VA = +VBD = 2.7V, fSCLK = 37.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 THEORY OF OPERATION The ADS7279 and ADS7280 are two high-speed, low-power, successive approximation register (SAR) analog-to-digital converters (ADCs) that use an external reference.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com Driver Amplifier Choice The analog input to the converter must be driven with a low-noise operational amplifier such as the THS4031 or OPA365. An RC filter is recommended at the input pins to low-pass filter the noise from the source.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 REFERENCE The ADS7279/80 must operate with an external reference with a range from 0.3V to 5V. A clean, low-noise, well-decoupled reference voltage on the REF+ pin is required to ensure good converter performance.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com Auto Channel Select Mode Channel selection can also be done automatically if auto channel select mode is enabled. This mode is the default channel select mode. The dual channel converter, ADS7280, has a built-in 2-to-1 MUX.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 Power-Down Modes The ADS7279/80 has a comprehensive, built-in power-down feature. There are three power-down modes: Deep power-down mode, Nap power-down mode, and Auto nap power-down mode. All three power-down modes are enabled by setting the related CFR bits.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com Auto Nap Mode Auto nap mode is almost identical to nap mode. The only difference is the time when the device is actually powered down and the method used to wake up the device. Configuration register bit D4 is only used to enable/disable Auto nap mode.
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ADS7279 ADS7280 www.ti.com ...............................................................................................................................................................
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 DIGITAL INTERFACE The serial clock is designed to accommodate the latest high-speed processors with an SCLK frequency up to 50MHz. Each cycle starts with the falling edge of FS/CS.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com Configuring the Converter and Default Mode The converter can be configured with command 1110b (write to the CFR) or command 1111b (default mode). A write to the CFR requires a 4-bit command followed by 12 bits of data. A 4-bit command takes effect at the fourth falling edge of SCLK.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 READING CONVERSION RESULT The conversion result is available to the input of the output data register (ODR) at EOC and presented to the output of the output register at the next falling edge of CS or FS.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com Micro Controller INT GPIO1 GPIO2 SDI SCLK CONVST CS ADS7279/80 #1 SDO EOC/INT SDOSCLK GPIO3 SDI SCLK CONVST CS ADS7279/80 #2 CDI SDO Program device #1 CFR_D[7:5] = XX0b SDI SDI SCLK CONVST CS ADS7279/80 #3 CDI SDO Program device #2 and #3 CFR_D[7:5] = XX1b Figure 61.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 Case 1: If chip select is not toggled (CS stays low), the next 16 bits are data from the upstream converter, and so on. This configuration is shown in Figure 62.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com Figure 64 shows a slightly different scenario where CONVST is not shared by the second converter. Converters #1 and #3 have the same CONVST signal. In this case, converter #2 simply passes the previous conversion data downstream.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 SCLK skew between converters and data path delay through the converters configured in chain mode can affect the maximum frequency of SCLK. The delay can also be affected by supply voltage and loading.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com When the device is powered up, the POR sets the device to default mode when AVDD reaches 1.5V.
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ADS7279 ADS7280 www.ti.com ............................................................................................................................................................... SBAS436A – MAY 2008 – REVISED JUNE 2009 APPLICATION INFORMATION TYPICAL CONNECTION Figure 68 shows a typical circuit configuration for the device. Analog Supply 4.
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ADS7279 ADS7280 SBAS436A – MAY 2008 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (May 2008) to Revision A ...........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
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PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADS7279IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 ADS7279IRSAR QFN RSA 16 3000 330.0 12.4 4.3 4.3 1.5 8.0 12.0 Q2 ADS7279IRSAT QFN RSA 16 250 180.0 12.4 4.3 4.3 1.5 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS7279IPWR ADS7279IRSAR TSSOP PW 16 2000 367.0 367.0 35.0 QFN RSA 16 3000 338.1 338.1 20.6 ADS7279IRSAT QFN RSA 16 250 210.0 185.0 35.0 ADS7280IPWR TSSOP PW 16 2000 367.0 367.0 35.0 ADS7280IRSAR QFN RSA 16 3000 338.1 338.1 20.6 ADS7280IRSAT QFN RSA 16 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.