Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal PDIP 28

ADS774

FEATURES

● REPLACES ADC574, ADC674 AND ADC774

FOR NEW DESIGNS

● COMPLETE SAMPLING A/D WITH

REFERENCE, CLOCK AND

MICROPROCESSOR INTERFACE

● FAST ACQUISITION AND CONVERSION:

8.5

µs max OVER TEMPERATURE

● ELIMINATES EXTERNAL SAMPLE/HOLD

IN MOST APPLICATIONS

● GUARANTEED AC AND DC PERFOR-

MANCE

● SINGLE +5V SUPPLY OPERATION

● LOW POWER: 120mW max

● PACKAGE OPTIONS: 0.6" and 0.3" DIPs,

SOIC

Microprocessor-Compatible Sampling

CMOS ANALOG-to-DIGITAL CONVERTER

Comparator

2.5V Reference

Input

CDAC

10V Range

20V Range

Bipolar Offset

–

2.5V Reference

Output

Control

Inputs

2.5V

Reference

Clock

Successive

Approximation

Control Logic

Three-State Buffers

Status

Parallel

Data

Output

DESCRIPTION

The ADS774 is a 12-bit successive approximation

analog-to-digital converter using an innovative

capacitor array (CDAC) implemented in low-power

CMOS technology. This is a drop-in replacement for

ADC574, ADC674, and ADC774 models in most

applications, with internal sampling, much lower power

consumption, and the ability to operate from a single

+5V supply.

The ADS774 is complete with internal clock, micro-

processor interface, three-state outputs, and internal

scaling resistors for input ranges of 0V to +10V, 0V to

+20V, ±5V, or ±10V. The maximum throughput time

is 8.5µs over the full operating temperature range,

including both acquisition and conversion.

Complete user control over the internal sampling func-

tion facilitates elimination of external sample/hold

amplifiers in most existing designs.

The ADS774 requires +5V, with –15V optional. No

+15V supply is required. Available packages include

0.3" or 0.6" wide 28-pin plastic DIP and 28-pin SOICs.

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111

Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

ADS774

SBAS010

Summary of content (21 pages)

PAGE 1
® ADS 774 ADS ADS774 774 ADS 774 Microprocessor-Compatible Sampling CMOS ANALOG-to-DIGITAL CONVERTER FEATURES DESCRIPTION ● REPLACES ADC574, ADC674 AND ADC774 FOR NEW DESIGNS The ADS774 is a 12-bit successive approximation analog-to-digital converter using an innovative capacitor array (CDAC) implemented in low-power CMOS technology.
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SPECIFICATIONS ELECTRICAL At TA = TMIN to TMAX , VDD = +5V, VEE = –15V to +5V, sampling frequency of 117kHz, fIN = 10kHz; unless otherwise specified. ADS774JE, JP, JU PARAMETER MIN TYP ADS774KE, KP, KU MAX RESOLUTION MIN TYP 12 MAX UNITS ✻ Bits INPUTS ANALOG Voltage Ranges: Unipolar Bipolar Impedance: 0 to +10V, ±5V ±10V, 0V to +20V DIGITAL (CE, CS, R/C, AO, 12/8) Voltages: Logic 1 Logic 0 Current Capacitance 8.5 35 +2.0 –0.5 –5 0 to +10, 0 to +20 ±5, ±10 ✻ ✻ 12 50 +5.5 +0.8 +5 0.
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SPECIFICATIONS (CONT) ELECTRICAL At TA = TMIN to TMAX , VDD = +5V, VEE = –15V to +5V, sampling frequency of 117kHz, fIN = 10kHz; unless otherwise specified. ADS774JE, JP, JU PARAMETER MIN TYP ADS774KE, KP, KU MAX MIN TYP MAX UNITS ✻ V V µA pF OUTPUTS DIGITAL (DB11 - DB0, STATUS) Output Codes: Unipolar Bipolar Logic Levels: Logic 0 (ISINK = 1.
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ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS VEE to Digital Common ....................................................... +VDD to –16.5V VDD to Digital Common .............................................................. 0V to +7V Analog Common to Digital Common .................................................... ±1V Control Inputs (CE, CS, AO, 12/8, R/C) to Digital Common .................................................. –0.5V to VDD +0.
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TYPICAL PERFORMANCE CURVES At TA = +25°C, VDD = VEE = +5V; Bipolar ±10V Input Range; sampling frequency of 110kHz; unless otherwise specified. All plots use 4096 point FFTs. SIGNAL/(NOISE + DISTORTION) vs INPUT FREQUENCY AND AMBIENT TEMPERATURE FREQUENCY SPECTRUM (±10V, 2kHz Input) 0 75 –20 Signal/(Noise + Distortion) (dB) S/(N + D) = 72.6dB THD = –93.5dB SNR = 72.6dB Magnitude (dB) –40 –60 –80 –100 –55°C 70 +25°C +125°C –120 65 0 10 20 30 40 50 55 0.
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THEORY OF OPERATION latch S1 in position “R” or “G”. Similarly, the second approximation is made by connecting S2 to the reference and S3 to GND, and latching S2 according to the output of the comparator. After three successive approximation steps have been made the voltage level at the comparator will be within 1/2LSB of GND, and a digital word which represents the analog input can be determined from the positions of S1, S2 and S3.
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+5V 10µF 1 28 2 27 DB11 (MSB) 3 26 DB10 4 25 DB9 5 24 DB8 6 23 DB7 Status Output Convert Command +5V NC* 50Ω (1) 50Ω 7 22 DB6 ADS774 8 21 DB5 9 20 DB4 10 19 DB3 11 18 DB2 12 17 DB1 Leave Unconnected 13 16 DB0 (LSB) 14 ±10V Analog Input 15 *Not internally connected NOTE: (1) Connect to GND or VEE for Emulation Mode. Connect to +5V for Control Mode. FIGURE 2. Basic ±10V Operation. presented as 12-bit words.
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Binary (BIN) Output Input Voltage Range and LSB Values Defined As: ±10V ±5V 0V to +10V 0V to +20V FSR 2n n=8 n = 12 20V 2n 78.13mV 4.88mV 10V 2n 39.06mV 2.44mV 10V 2n 39.06mV 2.44mV 20V 2n 78.13mV 4.
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tHRL R/C R/C tDS tHRH STATUS STATUS tCONVERSION tHDR tHDR tDDR tCONVERSION tHS High-Z DB11-DB0 High-Z-State DB11-DB0 tDS Data Valid High-Z-State Data Valid Data Valid FIGURE 3. R/C Pulse Low—Outputs Enabled After Conversion. SYMBOL FIGURE 4. R/C Pulse High — Outputs Enabled Only While R/C Is High.
PAGE 10
Word 1 Word 2 Processor DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Converter DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 STATUS 28 DB11 (MSB) 27 FIGURE 7. 12-Bit Data Format for 8-Bit Systems. 2 12/8 4 AO 26 AO 25 24 Address Bus 23 Data Bus 22 ADS774 21 20 19 18 17 DB0 (LSB) 16 Digital Common 15 FIGURE 8. Connection to an 8-Bit Bus.
PAGE 11
INSTALLATION In particular, the unused input pin should not be connected to any capacitive load, including high impedance switches. Even a few pF on the unused pin can degrade acquisition time. LAYOUT PRECAUTIONS Analog (pin 9) and digital (pin 15) commons are not connected together internally in the ADS774, but should be connected together as close to the unit as possible and to an analog common ground plane beneath the converter on the component side of the board.
PAGE 12
connected either to Pin 9 (Analog Common) for unipolar operation, or to Pin 8 (2.5V Ref Out), or the external reference, for bipolar operation. Full-scale and offset adjustments are described below. +VCC Unipolar Offset Adjust R1 100kΩ Full-Scale Adjust R2 10 Ref In 8 Ref Out 12 Bipolar Offset The input impedance of the ADS774 is typically 50kΩ in the 20V ranges and 12kΩ in the 10V ranges.
PAGE 13
where +12V or +15V is supplied on traditional ADC774s. Pin 11, the –12V or –15V supply input on traditional ADC774s, is used only as a logic input on the ADS774. There is a resistor divider internally on pin 11 to reduce that input to a correct logic level within the ADS774, and this resistor will add 10mW to 15mW to the power consumption of the ADS774 when –15V is supplied to pin 11.
PAGE 14
PACKAGE OPTION ADDENDUM www.ti.
PAGE 15
PACKAGE OPTION ADDENDUM www.ti.com 21-May-2010 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
PAGE 16
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADS774JU/1K SOIC DW 28 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1 ADS774KU/1K SOIC DW 28 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.
PAGE 17
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS774JU/1K SOIC DW 28 1000 367.0 367.0 55.0 ADS774KU/1K SOIC DW 28 1000 367.0 367.0 55.
PAGE 18
MECHANICAL DATA MPDI056 – APRIL 2001 NTD (R-PDIP-T28) PLASTIC DUAL-IN-LINE D 1.565 (39,75) 1.380 (35,05) 28 15 0.580 (14,73) 0.485 (12,32) 1 D 14 Index Area H 0.015 (0,38) MIN C 0.070 (1,78) Base Plane 0.030 (0,76) 0.250 (6,35) MAX C E 0.195 (4,95) 0.125 (3,18) 0.625 (15,88) 0.600 (15,24) –C– E Seating Plane 0.005 (0,13) MIN 4 PL D Full Lead 0.100 (2,54) 0.200 (5,08) 0.115 (2,92) 0.022 (0,56) 0.014 (0,36) 0.010 (0,25) M C 0.600 (15,26) C 0.015 (0,38) 0.008 (0,20) 0.060 (1,52) F 0.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.