Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External SOIC 8

DESCRIPTION

The ADS7817 is a 12-bit, 200kHz sampling Analog-to-

Digital (A/D) converter that features a high impedance fully

differential analog input. The reference voltage can be var-

ied from 100mV to 2.5V, with a corresponding input-

referred resolution between 49µV and 1.22mV.

The differential input, low power, automatic power down,

and small size make the ADS7817 ideal for direct connec-

tion to transducers in battery operated systems, remote data

acquisition, or multi-channel applications. The ADS7817 is

available in a plastic mini-DIP-8, an SO-8, or an MSOP-8

package.

12-Bit Differential Input Micro Power Sampling

ANALOG-TO-DIGITAL CONVERTER

FEATURES

● BIPOLAR INPUT RANGE

● TRUE DIFFERENTIAL INPUT

● 200kHz SAMPLING RATE

● MICRO POWER: 2.3mW at 200kHz

● POWER DOWN: 3µA Max

● AVAILABLE IN MSOP-8 PACKAGE

● SERIAL INTERFACE

● AC COMMON-MODE REJECTION

SAR

Control

Serial

Interface

OUT

Comparator

S/H Amp

CS/SHDN

DCLOCK

+In

REF

–In

CDAC

OPA658

ADS7817

APPLICATIONS

● TRANSDUCER INTERFACE

● BATTERY OPERATED SYSTEMS

● REMOTE DATA ACQUISITION

● ISOLATED DATA ACQUISITION

● AC MOTOR CONTROL

ADS7817

SBAS066A – MAY 2001

www.ti.com

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Summary of content (21 pages)

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ADS7817 AD ADS 781 7 OPSA7817 658 SBAS066A – MAY 2001 12-Bit Differential Input Micro Power Sampling ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION ● ● ● ● ● ● ● ● The ADS7817 is a 12-bit, 200kHz sampling Analog-toDigital (A/D) converter that features a high impedance fully differential analog input. The reference voltage can be varied from 100mV to 2.5V, with a corresponding inputreferred resolution between 49µV and 1.22mV.
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ABSOLUTE MAXIMUM RATINGS(1) ELECTROSTATIC DISCHARGE SENSITIVITY +VCC ..................................................................................................... +6V Analog Input ........................................................... –0.3V to (+VCC + 0.3V) Logic Input ............................................................. –0.3V to (+VCC + 0.3V) Case Temperature ......................................................................... +100°C Junction Temperature .......................
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ELECTRICAL CHARACTERISTICS At –40°C to +85°C, +VCC = +5V, VREF = +2.5V, fSAMPLE = 200kHz, fCLK = 16 • fSAMPLE, –In = +2.5V, unless otherwise specified. ADS7817 PARAMETER CONDITIONS MIN +In – (–In) +In –In –VREF –0.3 –0.3 ANALOG INPUT Full-Scale Input Span Absolute Input Voltage Capacitance Leakage Current REFERENCE INPUT Voltage Range Resistance Current Drain DIGITAL INPUT/OUTPUT Logic Family Logic Levels: VIH VIL VOH VOL Data Format +VREF VCC +0.3 4 ✻ ✻ ✻ TYP ±2 ±2 ±6 ±4 ±0.8 ±0.7 ✻ ✻ ✻ ✻ ✻ 0.
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TIMING CHARACTERISTICS At TA = +25°C, VCC = +5V, VREF = +2.5V, fSAMPLE = 200kHz, and fCLK = 16 • fSAMPLE, –In = +2.5V, unless otherwise specified. CHANGE IN OFFSET vs TEMPERATURE CHANGE IN OFFSET vs REFERENCE VOLTAGE 1.2 5 0.8 4 Delta from 25°C (LSB) Change in Offset (LSB) 4.5 3.5 3 2.5 2 1.5 1 0.4 0.0 –0.4 –0.8 0.5 –1.2 0 1.0 1.25 1.5 1.75 2.0 Reference Voltage (V) 2.25 –50 2.5 75 100 0.1 Delta from 25°C (LSB) Change in Gain (LSB) 25 50 Temperature (°C) 0.15 3.5 3 2.5 2 1.5 1 0.
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TIMING CHARACTERISTICS (Cont.) At TA = +25°C, VCC = +5V, VREF = +2.5V, fSAMPLE = 200kHz, and fCLK = 16 • fSAMPLE, –In = +2.5V, unless otherwise specified. FREQUENCY SPECTRUM (4096 Point FFT; fIN = 9.9kHz, –0.
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TIMING CHARACTERISTICS (Cont.) At TA = +25°C, VCC = +5V, VREF = +2.5V, fSAMPLE = 200kHz, and fCLK = 16 • fSAMPLE, –In = +2.5V, unless otherwise specified. DIFFERENTIAL LINEARITY ERROR vs CODE 1.00 0.75 0.75 0.50 0.50 0.25 0.25 DLE (LSB) ILE (LSB) INTEGRAL LINEARITY ERROR vs CODE 1.00 0.00 –0.25 0.00 –0.25 –0.50 –0.50 –0.75 –0.75 –1.00 –1.00 800 000 800 7FF 000 CHANGE IN INTEGRAL LINEARITY AND DIFFERENTIAL LINEARITY vs REFERENCE VOLTAGE INPUT LEAKAGE CURRENT vs TEMPERATURE 10 0.
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TIMING CHARACTERISTICS (Cont.) At TA = +25°C, VCC = +5V, VREF = +2.5V, fSAMPLE = 200kHz, and fCLK = 16 • fSAMPLE, –In = +2.5V, unless otherwise specified.
PAGE 8
THEORY OF OPERATION 2 • VREF peak-to-peak The ADS7817 is a classic successive approximation register (SAR) analog-to-digital (A/D) converter. The architecture is based on capacitive redistribution which inherently includes a sample/hold function. The converter is fabricated on a 0.6µ CMOS process. The architecture and process allow the ADS7817 to acquire and convert an analog signal at up to 200,000 conversions per second while consuming very little power.
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In each case, care should be taken to ensure that the output impedance of the sources driving the +In and –In inputs are matched. If this is not observed, the two inputs could have different settling times. This may result in offset error, gain error, and linearity error which change with both temperature and input voltage. If the impedance cannot be matched, the errors can be lessened by giving the ADS7817 more acquisition time.
PAGE 10
tCYC CS/SHDN POWER DOWN tSUCS DCLOCK tCSD DOUT HI-Z NULL BIT tSMPL NULL BIT HI-Z B11 B10 B9 (MSB) B8 B7 B6 B5 B4 B3 B2 B1 B0(1) tCONV B11 B10 B9 B8 tDATA Note: (1) After completing the data transfer, if further clocks are applied with CS LOW, the A/D will output LSB-First data then followed with zeroes indefinitely.
PAGE 11
1.
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There is an important distinction between the power down mode that is entered after a conversion is complete and the full power down mode which is enabled when CS is HIGH. While both power down the analog section, the digital section is powered down only when CS is HIGH. Thus, if CS is left LOW at the end of a conversion and the converter is continually clocked, the power consumption will not be as low as when CS is HIGH. See Figure 8 for more information.
PAGE 13
APPLICATION CIRCUITS Figures 9, 10 and 11 show some typical applications circuits for the ADS7817. Figure 9 shows a low cost, low power circuit for basic data acquisition. Total power dissipation in the ADS7817 and reference circuitry is under 5mW over temperature, power supply variations, and at a 200kHz sample rate. Figure 11 is a similar application that isolates the digital outputs of the three ADS7817s instead of the analog signal from the motor.
PAGE 14
+5V R1 1kΩ +VISO3 78L05 REF1004-1.2 Motorola DSPS6004 C10 5µF C1 C2 0.1µF GND3 0.1µF + C11 0.1µF +5V WST WSR R2 200Ω to 3rd Motor Leg Driver DOUT C3 0.01µF ISO130 ADS7817 CLK SDI 0 CS/SHDN R3 200Ω System GND System GND +5V GND3 +VISO2 R4 1kΩ 78L05 SCKR SCK/SCL REF1004-1.2 C12 5µF C4 C5 0.1µF GND2 0.1µF + C13 0.1µF +5V R5 200Ω to 2nd Motor Leg Driver CS/SHDN System GND System GND from PWM ••• +5V GND2 +VISO1 R7 1kΩ 78L05 REF1004-1.2 C14 5µF C8 C7 0.1µF GND1 0.
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+VISO1 R1 +5V +VCC Motorola DSP56004 R2 768Ω + C 1 4.7µF R3 301Ω REF1004-1.2 WST +150mV VREF + C 2 4.7µF R4 43.2Ω C3 0.1µF To 3rd Motor Leg SDO0 SDO1 SDO2 SCKT SCKR SDI0 To 2nd Motor Leg SDI1 WSR SCK/SCL MISO/SDA VREF +VCC from PWM HREQ R5 200Ω AC Motor MOSI/HA0 SS/HA2 C4 0.01µF RSENSE ADS7817 CS DOUT CLK R6 200Ω from PWM Opto-Couplers(1) 1st Motor Leg NOTE: (1) Suggested Opto-couplers are HCPL-2611 or HCPL-7611. Inverters or buffers will be needed to drive these devices.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 19
PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADS7817E/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 ADS7817E/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 ADS7817EB/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS7817E/250 VSSOP DGK 8 250 210.0 185.0 35.0 ADS7817E/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0 ADS7817EB/250 VSSOP DGK 8 250 210.0 185.0 35.0 ADS7817EB/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0 ADS7817EC/250 VSSOP DGK 8 250 210.0 185.0 35.0 ADS7817EC/2K5 VSSOP DGK 8 2500 367.0 367.0 35.
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