Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) Supply WQFN 16

4-Channel

MUX

CH0

CH1

CH2

CH3

MUXOUT ADCIN AVDD DVDD

AGND DGND

SAR

ADC

DataBuffers,

Sequencer,and

Alarms

I C

Interface

SDA

SCL

INT

PWRCON

RESET

Oscillator

ADS7924

www.ti.com

SBAS482A –JANUARY 2010–REVISED MAY 2010

2.2V, 12-Bit, 4-Channel, microPOWER™

ANALOG-TO-DIGITAL CONVERTER WITH I

C INTERFACE

Check for Samples: ADS7924

FEATURES

DESCRIPTION

234

• Intelligent Monitoring:

The ADS7924 is a four-channel, 12-bit,

analog-to-digital converter (ADC) with an I

C™

– Auto-Sequencing of 4-Channel Multiplexer

interface. With its low-power ADC core, support for

– Individual Alarm Thresholds for Each

low-supply operation, and a flexible measurement

Channel

sequencer that essentially eliminates power

– Programmable Scan Rate

consumption between conversions, the ADS7924

forms a complete monitoring system for power-critical

• Micropower Monitoring:

applications such as battery-powered equipment and

– Four-Channel Scanning:

energy harvesting systems.

– Every 1ms → 25mW

The ADS7924 features dedicated data registers and

– Every 10ms → 5mW

onboard programmable digital threshold comparators

– < 1µA of Power-Down Current

for each input. Alarm conditions can be programmed

that generate an interrupt. The combination of data

– Programmable Interrupt Pin Controls

buffering, programmable threshold comparisons, and

Shutdown/Wakeup of the Microcontroller

alarm interrupts minimize the host microcontroller

– Auto Power-Down Control

time needed to supervise the ADS7924.

– PWRCON Pin Allows Shutdown of External

The four-channel input multiplexer (MUX) is routed

Op Amp

through external pins to allow a common signal

• Wide Supply Range:

conditioning circuit to be used between the MUX and

– Analog Supply: 2.2V to 5.5V

ADC, thereby reducing overall component count. The

low-power ADC uses the analog supply as its

– Digital Supply: 1.65V to 5.5V

reference and can acquire and convert signals in only

• Small Footprint: 3mm × 3mm QFN

10ms. An onboard oscillator eliminates the need to

supply a master clock.

APPLICATIONS

The ADS7924 is offered in a small 3mm × 3mm QFN

• Portable and Battery-Powered Systems:

and is fully specified for operation over the industrial

– Medical, Communications, Remote Sensor

temperature range of –40°C to +85°C.

Signal Monitoring, Power-Supply

Monitoring

• Energy Harvesting

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2microPOWER is a trademark of Texas Instruments Incorporated.

C is a trademark of NXP Semiconductors.

4All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (44 pages)

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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 2.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 ELECTRICAL CHARACTERISTICS Minimum/maximum specifications are at TA = –40°C to +85°C, 1.65V < DVDD < 5.5V, and 2.2V < AVDD < 5.5V. Typical specifications are at TA = +25°C, AVDD = 5V, and DVDD = 5V, unless otherwise noted.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com PIN CONFIGURATION DVDD AVDD ADCIN MUXOUT 15 14 13 8 4 AGND SDA (1) 7 3 Pad PWRCON SCLK Thermal 6 2 DGND INT 5 1 A0 RESET 16 RTE PACKAGE QFN-16 (TOP VIEW) 12 CH0 11 CH1 10 CH2 9 CH3 (1) Connect to AGND.
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 TIMING DIAGRAM tVDDAT tHIGH tVDACK tR tHDSTA tF tLOW SCL tSUDAT tHDSTA 9th Clock tSUSTO tSUSTA tSP tHDDAT SDA tBUF P S Sr P NOTE: S = Start, Sr = Repeated Start, and P = Stop. Figure 1. I2C Timing Diagram Table 1. I2C Timing Definitions ADS7924 PARAMETER MIN MAX UNIT 0.4 MHz SCL operating frequency fSCL 0 Bus free time between START and STOP condition tBUF 1.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com TYPICAL CHARACTERISTICS At TA = +25°C, unless otherwise noted. CURRENT vs TEMPERATURE AVERAGE POWER DISSIPATION vs CYCLE TIME 1000 12 Auto-Single Mode tCYCLE = 2.5ms AVDD = DVDD = 5.0V 10 Fast I C Interface Mode AVDD = 2.2V tPU = 0V tACQ = 6ms 2 Power (mW) Current (mA) 14 8 6 Analog Current Auto-Scan Modes (4-Channel Measurements) 10 4 2 100 Auto-Single Modes (1-Channel Measurements) Digital Current 0 -40.0 -25.5 -11.0 3.
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, unless otherwise noted. OFFSET ERROR DRIFT, TYPICAL TYPICAL OFFSET ERROR vs AVDD VOLTAGE 5.0 3 AVDD = 2.2V 2 4.0 Offset Error (LSB) Offset Error (LSB) 30 Units Across Two Lots 4.5 1 0 -1 Mean + s Mean Mean - s 3.5 3.0 2.5 2.0 1.5 1.0 -2 0.5 -3 0 18 -11 -40 47 76 105 2 AVDD Voltage (V) Figure 8. Figure 9. INTERNAL OSCILLATOR FREQUENCY vs VOLTAGE INTEGRAL NONLINEARITY 1.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, unless otherwise noted. DIFFERENTIAL NONLINEARITY DIFFERENTIAL NONLINEARITY 1.5 1.5 AVDD = 5V AVDD = 2.2V 1.0 Linearity Error (LSB) Linearity Error (LSB) 1.0 0.5 0 -0.5 -1.0 0.5 0 -0.5 -1.0 -1.5 -1.5 0 512 1024 1536 2048 3072 2560 4096 3584 0 512 1024 1536 Code 1.5 2048 2560 3072 3584 4096 Code Figure 14. Figure 15.
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 OVERVIEW The ADS7924 is a miniature, four-channel, multiplexed, 12-bit, analog-to-digital converter (ADC) with an I2C serial interface. Figure 19 shows a block diagram. The four-channel input multiplexer is routed through external pins to allow a common signal conditioning block to be used for all four channels.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com MULTIPLEXER The ADS7924 has a four-channel, single-ended input multiplexer. As Figure 20 shows, ESD diodes protect the inputs. Make sure these diodes do not turn on by staying within the absolute input voltage range specification. The MUXOUT pin can be connected to AGND within the multiplexer; for example, to provide a test signal of 0V or as part of a calibration procedure.
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 ADC CONVERSION TIMING Sleep Time The ADS7924 provides a flexible timing arrangement to support a wide variety of measurement needs. Three user-controlled timings include power up (tPU), acquisition (tACQ), and sleep (tSLEEP) plus a fixed conversion time (tCONV). The sleep time is allowed to elapse after conversions in the Auto-Single with Sleep, Auto-Scan with Sleep, and Auto-Burst Scan with Sleep modes.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com ALARM When an alarm occurs, the INT pin can be configured to generate an interrupt. The channel that generated the alarm can be read from the registers. A read of the Interrupt Control register clears the alarm register and also resets the alarm counter. The ADS7924 offers an independent alarm function for each input channel.
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 Manual-Single Mode After the conversion completes, the device waits for a new mode to be set. This mode can be set to Idle to save power. When tPU and tACQ are very short, the very short conversion time needed allows a read register operation to be issued on the I2C bus immediately after the write operation that initiates this mode. It is important to note that tPU only applies to the first manual-single command.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com Manual-Scan Mode This mode converts all of the channels once, starting with the selected channel, as illustrated in Figure 24. After the ADC Mode Control register is written, the power-up time (tPU) is allowed to elapse. This value can be set to '0' to effectively bypass if not needed. Before each conversion, an acquisition time (tACQ) is allowed to elapse. tACK time is programmable through the ACQCONFIG register, bits[4:0].
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 Auto-Single Mode This mode automatically converts the selected channel continuously, as shown in Figure 25. After the ADC Mode Control register is written, the power-up time (tPU) is allowed to elapse. This value can be set to '0' to effectively bypass if not needed. Before the conversion, an acquisition time (tACQ) is allowed to elapse. tACQ time is programmable through the ACQCONFIG register, bits[4:0].
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com Auto-Scan Mode This mode automatically converts all the channels continuously, starting with the selected channel, as illustrated in Figure 26. After the ADC Mode Control register is written, the power-up time (tPU) is allowed to elapse. This value can be set to '0' to effectively bypass if not needed. Before the conversion, an acquisition time (tACQ) is allowed to elapse. tACQ time is programmable through the ACQCONFIG register, bits[4:0].
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 Auto-Single with Sleep Mode This mode automatically converts the selected channel repeatedly with a sleep interval between conversions, as shown in Figure 27. After the ADC Mode Control register is written, the power-up time (tPU) is allowed to elapse. This value can be set to '0' to effectively bypass if not needed. Before the conversion, an acquisition time (tACQ) is allowed to elapse.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com Auto-Scan with Sleep Mode This mode automatically converts all the channels repeatedly with a sleep interval between conversions, as illustrated in Figure 28. After the ADC Mode Control register is written, the power-up time (tPU) is allowed to elapse. This value can be set to '0' to effectively bypass if not needed. Before the first conversion of the selected input, an acquisition time (tACQ) is allowed to elapse.
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 Auto-Burst Scan with Sleep Mode This mode automatically converts all the channels without delay followed by a sleep interval before the cycle repeats, as shown in Figure 29. After the ADC Mode Control register is written, the power-up time (tPU) is allowed to elapse. This value can be set to '0' to effectively bypass if not needed. Before the first conversion of the selected input, an acquisition time (tACQ) is allowed to elapse.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com REGISTER MAP The ADS7924 operation is controlled through a set of registers. Collectively, the registers contain all the information needed to configure the part. Table 3 shows the register map. Table 3.
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ADS7924 www.ti.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 There are individual registers: the upper significant bits. The order of conversion. CH0. www.ti.com registers for each input channel to buffer the conversion data.
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 There are individual upper and lower threshold registers for input channel. Each register is eight bits with the least significant bit weight equal to AVDD/256. The comparator is tripped when the input signal exceeds the value of the upper limit register or falls below the lower limit register.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com INTCONFIG: Interrupt Configuration Register (Address = 12h) 7 6 5 4 3 2 1 0 ALMCNT2 ALMCNT1 ALMCNT0 INTCNFG2 INTCNFG1 INTCNFG0 INTPOL INTTRIG Bits[7:5] ALMCNT[2:0]: Alarm count These bits set the number of times the comparator threshold limit (either upper or lower) must be exceeded to generate an alarm.
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 SLPCONFIG: Sleep Configuration Register (Address = 13h) 7 6 5 4 3 2 1 0 0 CONVCTRL SLPDIV4 SLPMULT8 0 SLPTIME2 SLPTIME1 SLPTIME0 Bit 7 Always write '0' Bit 6 CONVCTRL: Conversion control This bit determines the conversion status after a conversion control event; see the INTCNFG bits in the INTCONFIG register.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com ACQCONFIG: Acquire Configuration Register (Address = 14h) 7 6 5 4 3 2 1 0 0 0 0 ACQTIME4 ACQTIME3 ACQTIME2 ACQTIME1 ACQTIME0 Bits[7:5] Always write '0' Bits[4:0] ACQTIME[4:0]: Signal acquire time These bits set the time to acquire the signal before a conversion (default = 0).
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 I2C INTERFACE The ADS7924 communicates through an I2C interface. I2C is a two-wire, open-drain interface that supports multiple devices and masters on a single bus. Devices on the I2C bus only drive the bus lines low by connecting them to ground; they never drive the bus lines high. Instead, the bus wires are pulled high by pull-up resistors, so the bus wires are high when no device is driving them low.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com Receive Mode: least significant byte is then sent by the slave and is followed by an acknowledgment from the master. The master may terminate transmission after any byte by not acknowledging or issuing a START or STOP condition. In slave receive mode the first byte transmitted from the master to the slave is the address with the R/W bit low. This byte allows the slave to be written to.
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ADS7924 www.ti.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com READING THE REGISTERS The master may issue a START condition and send the slave address byte with the R/W bit high to begin the read. Note that if the previously selected register is to be read again there is no need to update the pointer address. Figure 32 to Figure 34 show examples of register reads. To read a specific register from the ADS7924, the master must first write the appropriate value to the pointer address.
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ADS7924 www.ti.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com APPLICATION INFORMATION AVERAGE POWER CONSUMPTION With its fast conversion time and programmable sleep time with near-zero power, the ADS7924 allows periodic monitoring of the inputs with a very low average power dissipation, especially as the monitoring interval increases.
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 BASIC CONNECTIONS The ADS7924 provides a break-out point in the signal path between the multiplexer output and the ADC input for external signal conditioning, if desired. Typical uses include adding an op amp, such as the TLV2780, along with an RC filter circuit. Using an Op Amp Adding an op amp provides a high input impedance to the sensor source and buffers the capacitive ADC input from high-impedance sensor circuits, as shown in Figure 35.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com Using an Op Amp and RC Filter Placing an RC low-pass filter in the signal path allows for filtering out noise. The RC component values should allow for sufficient settling time when changing from channel to channel.
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 Op Amp Power-Up Time The TLV2780 typically powers up from a shutdown state in 800ns. This period is well within the ADS7924 minimum acquisition time of 6ms. Setting the PWRCONFIG register (address = 15h) allows for more time if another op amp with a shutdown feature is used. Using an RC Filter For applications where low output impedance signals are provided for the ADS7924 inputs, a simple RC filter may suffice, as shown in Figure 37.
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ADS7924 SBAS482A – JANUARY 2010 – REVISED MAY 2010 www.ti.com Op Amp with Filter and Gain Option Both filtering and gain are added in Figure 38. Gain is given by Equation 8: Gain = 1 + R1/R2 Where: R is the sum of the sensor output impedance RSENSOR, the internal MUX resistance RMUX (approximately 60Ω), and the external resistor RX.
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ADS7924 www.ti.com SBAS482A – JANUARY 2010 – REVISED MAY 2010 Driving an RC Filter and the ADCIN Pin With An Op Amp A filter can be placed at the output of the op amp, as shown in Figure 39. Care must be taken to ensure that the op amp is capable of driving the RC filter circuit without the op amp becoming unstable. One of the benefits of this circuit is that the op amp noise is filtered along with sensor and other system noise right at the ADC input pin.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADS7924IRTER WQFN RTE 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 ADS7924IRTET WQFN RTE 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS7924IRTER WQFN RTE 16 3000 367.0 367.0 35.0 ADS7924IRTET WQFN RTE 16 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.