Datasheet

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ADS8320

DESCRIPTION

The ADS8320 is a 16-bit, sampling analog-to-digital (A/D)

converter with ensured specifications over a 2.7V to 5.25V

supply range. It requires very little power even when operat-

ing at the full 100kHz data rate. At lower data rates, the high

speed of the device enables it to spend most of its time in the

power-down mode—the average power dissipation is less

than 100mW at 10kHz data rate.

The ADS8320 also features operation from 2.0V to 5.25V, a

synchronous serial (SPI/SSI compatible) interface, and a

differential input. The reference voltage can be set to any

level within the range of 500mV to V

Ultra-low power and small size make the ADS8320 ideal

for portable and battery-operated systems. It is also a

perfect fit for remote data acquisition modules, simulta-

neous multi-channel systems, and isolated data acquisi-

tion. The ADS8320 is available in an MSOP-8 package.

16-Bit, High-Speed, 2.7V to 5V

micro

Power Sampling

ANALOG-TO-DIGITAL CONVERTER

FEATURES

● 100kHz SAMPLING RATE

●

micro

POWER:

1.8mW at 100kHz and 2.7V

0.3mW at 10kHz and 2.7V

● POWER-DOWN: 3µA max

● MSOP-8 PACKAGE

● PIN-COMPATIBLE TO ADS7816 AND ADS7822

● SERIAL (SPI™/SSI) INTERFACE

SAR

Control

Serial

Interface

OUT

Comparator

S/H Amp

CS/SHDN

DCLOCK

+In

REF

–In

CDAC

APPLICATIONS

● BATTERY-OPERATED SYSTEMS

● REMOTE DATA ACQUISITION

● ISOLATED DATA ACQUISITION

● SIMULTANEOUS SAMPLING,

MULTICHANNEL SYSTEMS

● INDUSTRIAL CONTROLS

● ROBOTICS

● VIBRATION ANALYSIS

SBAS108D – MAY 2000 – REVISED MARCH 2007

www.ti.com

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SPI is a trademark of Motorola, Inc. All other trademarks are the property of their respective owners.

Summary of content (21 pages)

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ADS8320 SBAS108D – MAY 2000 – REVISED MARCH 2007 16-Bit, High-Speed, 2.7V to 5V microPower Sampling ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION ● 100kHz SAMPLING RATE ● microPOWER: 1.8mW at 100kHz and 2.7V 0.3mW at 10kHz and 2.7V ● POWER-DOWN: 3µA max ● MSOP-8 PACKAGE ● PIN-COMPATIBLE TO ADS7816 AND ADS7822 ● SERIAL (SPI™/SSI) INTERFACE The ADS8320 is a 16-bit, sampling analog-to-digital (A/D) converter with ensured specifications over a 2.7V to 5.25V supply range.
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SPECIFICATIONS: +VCC = +5V At –40°C to +85°C, VREF = +5V, –IN = GND, fSAMPLE = 100kHz, and fCLK = 24 • fSAMPLE, unless otherwise specified. ADS8320E PARAMETER CONDITIONS MIN TYP ADS8320EB MAX RESOLUTION ANALOG INPUT Full-Scale Input Span Absolute Input Range +In – (–In) +In –In 0 –0.1 –0.1 VREF VCC + 0.1 +1.
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SPECIFICATIONS: +VCC = +2.7V At –40°C to +85°C, VREF = 2.5V, –IN = GND, fSAMPLE = 100kHz, and fCLK = 24 • fSAMPLE, unless otherwise specified. ADS8320E PARAMETER CONDITIONS MIN TYP ADS8320EB MAX RESOLUTION ANALOG INPUT Full-Scale Input Span Absolute Input Range +In – (–In) +In –In 0 –0.1 –0.
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ELECTROSTATIC DISCHARGE SENSITIVITY PIN CONFIGURATION Top View MSOP VREF 1 +In 2 8 +VCC 7 DCLOCK Electrostatic discharge can cause damage ranging from performance degradation to complete device failure. Texas Instruments recommends that all integrated circuits be handled and stored using appropriate ESD protection methods. ADS8320 –In 3 6 DOUT GND 4 5 CS/SHDN ESD damage can range from subtle performance degradation to complete device failure.
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TYPICAL PERFORMANCE CURVES At TA = +25°C, VCC = +5V, VREF = +5V, fSAMPLE = 100kHz, and fCLK = 24 • fSAMPLE, unless otherwise specified. INTEGRAL LINEARITY ERROR vs CODE (+25°C) DIFFERENTIAL LINEARITY ERROR vs CODE (+25°C) 20 3.0 Differential Linearity Error (LSB) Integral Linearity Error (LSB) 1.0 0.0 –1.0 –2.0 –3.0 –4.0 –5.0 –6.0 0000H 4000H 8000H Hex Code C000H 2.0 1.0 0.0 –1.0 –2.0 –3.
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TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VCC = +2.7V, VREF = +2.5V, fSAMPLE = 100kHz, and fCLK = 24 • fSAMPLE, unless otherwise specified. CHANGE IN OFFSET vs TEMPERATURE CHANGE IN OFFSET vs REFERENCE VOLTAGE 3 6 VCC = 5V 2 4 Delta from +25 C (LSB) Change in Offset (LSB) 5 3 2 1 0 –1 1 5V 0 2.
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TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VCC = +5V, VREF = +5V, fSAMPLE = 100kHz, and fCLK = 24 • fSAMPLE, unless otherwise specified.
PAGE 8
THEORY OF OPERATION The ADS8320 is a classic successive approximation register (SAR) analog-to-digital (A/D) converter. The architecture is based on capacitive redistribution, which inherently includes a sample/hold function. The converter is fabricated on a 0.6µ CMOS process. The architecture and process allow the ADS8320 to acquire and convert an analog signal at up to 100,000 conversions per second while consuming less than 4.5mW from +VCC.
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NOISE The noise floor of the ADS8320 itself is extremely low, as can be seen from Figures 1 and 2, and is much lower than competing A/D converters. It was tested by applying a lownoise DC input and a 5.0V reference to the ADS8320 and initiating 5000 conversions. The digital output of the A/D 2510 0 0 1 2 2490 3 4 0 0 5 6 Code FIGURE 1. Histogram of 5000 Conversions of a DC Input at the Code Transition. 4864 converter varies in output code due to the internal noise of the ADS8320.
PAGE 10
SERIAL INTERFACE The ADS8320 communicates with microprocessors and other digital systems via a synchronous 3-wire serial interface, as shown in Figure 3 and Table I. The DCLOCK signal synchronizes the data transfer with each bit being transmitted on the falling edge of DCLOCK. Most receiving systems will capture the bitstream on the rising edge of DCLOCK. However, if the minimum hold time for DOUT is acceptable, the system can use the falling edge of DCLOCK to capture each bit.
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1.
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LAYOUT For optimum performance, care should be taken with the physical layout of the ADS8320 circuitry. This is particularly true if the reference voltage is low and/or the conversion rate is high. At a 100kHz conversion rate, the ADS8320 makes a bit decision every 416ns.
PAGE 13
The basic SAR architecture is sensitive to spikes on the power supply, reference, and ground connections that occur just prior to latching the comparator output. Thus, during any single conversion for an n-bit SAR converter, there are n “windows” in which large external transient voltages can easily affect the conversion result. Such spikes might originate from switching power supplies, digital logic, and high power devices, to name a few.
PAGE 14
Revision History DATE REVISION PAGE SECTION 3/07 D 4 Absolute Max Ratings 7/06 C 6 Typ Performance Curves DESCRIPTION Added last row, Input current to any pin except supply...±10mA Changed CHANGE IN OFFSET vs TEMPERATURE plot NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 14 ADS8320 www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 17
PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADS8320E/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 ADS8320E/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 ADS8320EB/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS8320E/250 VSSOP DGK 8 250 210.0 185.0 35.0 ADS8320E/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0 ADS8320EB/250 VSSOP DGK 8 250 210.0 185.0 35.0 ADS8320EB/2K5 VSSOP DGK 8 2500 367.0 367.0 35.
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