Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal TQFP 32

SAR

OutputLatches

and

3-State

Drivers

Comparator

ADS8323

S/HAmp

BYTE

Parallel

Data

Output

+IN

-IN

CDAC

REF

Conversion

andControl

Logic

Internal

+2.5VRef

CONVST

CLOCK

BUSY

REF

OUT

ADS8323

www.ti.com

SBAS224C –DECEMBER 2001–REVISED JANUARY 2010

16-Bit, 500kSPS, microPower Sampling

ANALOG-TO-DIGITAL CONVERTER

Check for Samples: ADS8323

FEATURES

DESCRIPTION

• HIGH-SPEED PARALLEL INTERFACE

• 500kSPS SAMPLING RATE

The ADS8323 is a 16-bit, 500kSPS analog-to-digital

converter (ADC) with an internal 2.5V reference. The

• LOW POWER: 85mW at 500kSPS

device includes a 16-bit, capacitor-based successive

• BIPOLAR INPUT RANGE

approximation register (SAR) ADC with inherent

• TQFP-32 PACKAGE

sample-and-hold. The ADS8323 offers a full 16-bit

interface, or an 8-bit option where data are read using

two read cycles. The ADS8323 is available in a

APPLICATIONS

TQFP-32 package and is specified over the industrial

• HIGH-SPEED DATA ACQUISITION

–40°C to +85°C temperature range.

• OPTICAL POWER MONITORING

white space here

• MOTOR CONTROL

• ATE

white space here

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (25 pages)

PAGE 1
ADS8323 www.ti.com SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 16-Bit, 500kSPS, microPower Sampling ANALOG-TO-DIGITAL CONVERTER Check for Samples: ADS8323 FEATURES 1 • • • • • 2 DESCRIPTION HIGH-SPEED PARALLEL INTERFACE 500kSPS SAMPLING RATE LOW POWER: 85mW at 500kSPS BIPOLAR INPUT RANGE TQFP-32 PACKAGE The ADS8323 is a 16-bit, 500kSPS analog-to-digital converter (ADC) with an internal 2.5V reference.
PAGE 2
ADS8323 SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 3
ADS8323 www.ti.com SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 ELECTRICAL CHARACTERISTICS At –40°C to +85°C, +DVDD = +AVDD = +5V, VREF = +2.5V, fSAMPLE = 500kSPS, and fCLK = 20 • fSAMPLE, unless otherwise specified. ADS8323YB (1) ADS8323Y PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT RESOLUTION Resolution 16 16 Bits ANALOG INPUT Full-scale input span (2) Absolute input range +IN – (–IN) –VREF +VREF –VREF +VREF V +IN –0.3 AVDD + 0.3 –0.3 AVDD + 0.3 V –IN –0.
PAGE 4
ADS8323 SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) At –40°C to +85°C, +DVDD = +AVDD = +5V, VREF = +2.5V, fSAMPLE = 500kSPS, and fCLK = 20 • fSAMPLE, unless otherwise specified. ADS8323YB (1) ADS8323Y PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT DIGITAL INPUT/OUTPUT Logic family CMOS CMOS Logic levels: VIH IIH ≤ +5μA 3.0 +DVDD 3.0 +DVDD V VIL IIL ≤ –5μA –0.3 0.8 –0.3 0.8 V VOH IOH = –1.6mA 4.0 VOL IOH = +1.
PAGE 5
ADS8323 www.ti.
PAGE 6
ADS8323 SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 www.ti.
PAGE 7
ADS8323 www.ti.com SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 TIMING INFORMATION tC1 tW2 tW1 CLOCK 2 1 3 Acquisition 4 5 17 18 19 Conversion Acquisition tCONV tACQ 20 1 2 3 4 17 18 19 20 tD1 CONVST tW3 BUSY tW4 tD2 tD4 BYTE tD3 tW5 CS tD5 tD6 tD9 tD8 tW7 tW6 RD tD7 DB15-D8 Bits 15-8 Bits 15-8 FF DB7-D0 Bits 7-0 Bits 7-0 Bits 15-8 TIMING CHARACTERISTICS (1) (2) All specifications typical at –40°C to +85°C, +DVDD = +5V.
PAGE 8
ADS8323 SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 www.ti.com TYPICAL CHARACTERISTICS At –40°C to +85°C, +DVDD = +AVDD = +5V, VREF = +2.5V, fSAMPLE = 500kSPS, and fCLK = 20 • fSAMPLE, unless otherwise specified. FREQUENCY SPECTRUM (4096 Point FFT; fIN = 100.1kHz, –0.
PAGE 9
ADS8323 www.ti.com SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 TYPICAL CHARACTERISTICS (continued) At –40°C to +85°C, +DVDD = +AVDD = +5V, VREF = +2.5V, fSAMPLE = 500kSPS, and fCLK = 20 • fSAMPLE, unless otherwise specified. GAIN ERROR vs TEMPERATURE 762.9 0.4 30.5 8 610.4 0.2 15.3 6 457.8 4 305.2 2 152.6 0 0 0 Delta (LSB) 10 -0.2 -15.3 -0.4 -30.5 0 -45.8 -2 -0.6 Ð40 Ð20 0 20 40 Temperature (°C) 60 80 100 -152.6 -40 0 -20 20 40 Temperature (°C) Figure 7.
PAGE 10
ADS8323 SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) At –40°C to +85°C, +DVDD = +AVDD = +5V, VREF = +2.5V, fSAMPLE = 500kSPS, and fCLK = 20 • fSAMPLE, unless otherwise specified. LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE 0 0 -1 -76.3 -2 -152.6 -3 -228.9 -4 -305.2 -5 -40 -381.5 -20 0 20 40 Temperature (°C) 60 80 100 INL (LSB) 76.
PAGE 11
ADS8323 www.ti.com SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 THEORY OF OPERATION The ADS8322 is a high-speed successive approximation register (SAR) A/D converter with an internal 2.5V bandgap reference that operates from a single +5V supply. The input is fully differential with a typical common-mode rejection of 70dB. The device accepts a differential analog input voltage in the range of –VREF to +VREF, centered on the common-mode voltage (see the Analog Input section).
PAGE 12
ADS8323 SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 www.ti.com The analog input is provided to two input pins, +IN and –IN. When a conversion is initiated, the differential input on these pins is sampled on the internal capacitor array. A conversion is initiated on the ADS8323 by bringing CONVST (pin 21) low for a minimum of 20ns. CONVST low places the sample-and-hold amplifier in the hold state and the conversion process is started.
PAGE 13
ADS8323 www.ti.com SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 +IN CM + VREF +VREF CM Voltage -IN = CM Voltage -VREF t CM - VREF Single-Ended Inputs +IN CM + 1/2VREF +VREF CM Voltage CM - 1/2VREF -VREF -IN t Differential Inputs Common-Mode Voltage (Differential Mode) = Note: (+IN) + (-IN) , Common-Mode Voltage (Single-Ended Mode) = IN-. 2 The maximum differential voltage between +IN and –IN of the ADS8323 is VREF.
PAGE 14
ADS8323 SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 www.ti.com NOISE R1 Figure 20 shows the transition noise of the ADS8323. A low-level dc input was applied to the analog-input pins and the converter was put through 8192 conversions. The digital output of the ADC varies in output code due to the internal noise of the ADS8323. This characteristic is true for all 16-bit SAR-type ADCs. The ADS8323, with five output codes for the σ distribution, yields a greater than ±0.
PAGE 15
ADS8323 www.ti.com SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 EXPLANATION OF CLOCK, BUSY AND BYTE PINS CLOCK: An external clock must be provided for the ADS8323. The maximum clock frequency is 10MHz and that provides 500kSPS throughput. The minimum clock frequency is 25kHz and that provides 1.25kHz throughput. The minimum clock cycle is 100ns (see Timing Diagram, tC1), and CLOCK must remain high (see Timing Diagram, tW1) or low (see Timing Diagram, tW2) for at least 40ns.
PAGE 16
ADS8323 SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 www.ti.com LAYOUT For optimum performance, care should be taken with the physical layout of the ADS8323 circuitry. This consideration is particularly true if the CLOCK input is approaching the maximum throughput rate. As the ADS8323 offers single-supply operation, it is often used in close proximity with digital logic, microcontrollers, microprocessors, and digital signal processors.
PAGE 17
ADS8323 www.ti.com SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 0111 1111 1111 1111 65535 0111 1111 1111 1110 65534 0111 1111 1111 1101 65533 0000 0000 0000 0001 32769 0000 0000 0000 0000 32768 1111 1111 1111 1111 32767 1000 0000 0000 0010 Step Digital Output Code Binary Twos Complement (BTC) 2 1000 0000 0000 0001 1 1000 0000 0000 0000 0 2.499962V VNFS = VCM - VREF = 0V 0.000038V 2.500038V VPFS = VCM + VREF = 5V VPFS Ð 1LSB = 4.999924V VBPZ = 2.5V 0.000076V 4.
PAGE 18
ADS8323 SBAS224C – DECEMBER 2001 – REVISED JANUARY 2010 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (May, 2002) to Revision C Page • Updated document format to current standards ................................................................................................................... 1 • Deleted lead temperature specifications from Absolute Maximum Ratings table ..............................
PAGE 19
PACKAGE OPTION ADDENDUM www.ti.
PAGE 20
PACKAGE OPTION ADDENDUM www.ti.com 21-May-2010 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PAGE 21
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADS8323Y/250 TQFP PBS 32 250 330.0 16.4 7.2 7.2 1.5 12.0 16.0 Q2 ADS8323Y/2K TQFP PBS 32 2000 330.0 16.4 7.2 7.2 1.5 12.0 16.0 Q2 ADS8323YB/250 TQFP PBS 32 250 330.0 16.4 7.2 7.2 1.5 12.0 16.
PAGE 22
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS8323Y/250 TQFP PBS ADS8323Y/2K TQFP PBS 32 250 367.0 367.0 38.0 32 2000 367.0 367.0 38.0 ADS8323YB/250 TQFP PBS 32 250 367.0 367.0 38.
PAGE 23
PAGE 24
PAGE 25
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.