AD ADS8365 ® S8 36 5 www.ti.com....................................................................................................................................................
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 RECOMMENDED OPERATING CONDITIONS Supply voltage, AVDD to AGND MIN NOM MAX UNIT 4.75 5 5.25 V 3.6 V Low-voltage levels 2.7 5V logic levels 4.5 5 5.5 V Reference input voltage 1.5 2.5 2.6 V Operating common-mode signal, –IN 2.2 2.5 2.
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS: 100kSPS (continued) Over recommended operating free-air temperature range at –40°C to +85°C, AVDD = 5V, BVDD = 3V, VREF = internal +2.5V, fCLK = 2MHz, and fSAMPLE = 100kSPS, unless otherwise noted.
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 ELECTRICAL CHARACTERISTICS: 100kSPS (continued) Over recommended operating free-air temperature range at –40°C to +85°C, AVDD = 5V, BVDD = 3V, VREF = internal +2.5V, fCLK = 2MHz, and fSAMPLE = 100kSPS, unless otherwise noted.
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS: 250kSPS Over recommended operating free-air temperature range at –40°C to +85°C, AVDD = 5V, BVDD = 3V, VREF = internal +2.
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 ELECTRICAL CHARACTERISTICS: 250kSPS (continued) Over recommended operating free-air temperature range at –40°C to +85°C, AVDD = 5V, BVDD = 3V, VREF = internal +2.5V, fCLK = 5MHz, and fSAMPLE = 250kSPS, unless otherwise noted ADS8365 PARAMETER TEST CONDITIONS MIN TYP (1) MAX 2.475 2.5 2.
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS: 250kSPS (continued) Over recommended operating free-air temperature range at –40°C to +85°C, AVDD = 5V, BVDD = 3V, VREF = internal +2.
ADS8365 www.ti.com....................................................................................................................................................
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com TERMINAL FUNCTIONS (continued) TERMINAL NO. I/O (1) CH C1+ 19 AI Noninverting input channel C1 NAP 20 DI Nap mode.Low level or unconnected = normal operation; high level = Nap mode.
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 TIMING INFORMATION tC1 CLK 1 2 16 17 18 20 19 1 2 tW1 CONVERSION tCONV tD1 ACQUISITION tACQ HOLDX tW3 tW2 EOC CS tD4 tD5 tW6 RD tW5 tD7 tD6 D15–D8 Bits 15–8 Bits 15–8 D7–D0 Bits 7–0 Bits 7–0 BYTE Figure 1.
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com TIMING CHARACTERISTICS (1) (2) (3) (4) Over recommended operating free-air temperature range, TMIN to TMAX, AVDD = 5V, REFIN = REFOUT, VREF = internal +2.5V, fCLK = 5MHz, fSAMPLE = 250kSPS, and BVDD = 2.7 to 5V, unless otherwise noted, SYMBOL DESCRIPTION MAX UNIT tACQ Acquisition time 0.
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 TYPICAL CHARACTERISTICS At TA = +25°C, AVDD = +5V, BVDD = +3V, VREF = internal +2.5V, fCLK = 5MHz, and fSAMPLE = 250kSPS, unless otherwise noted. INTEGRAL LINEARITY ERROR vs CODE (100kSPS) DIFFERENTIAL LINEARITY ERROR vs CODE (100kSPS) 2.0 4 3 1.5 1.0 1 DNL (LSB) INL (LSB) 2 0 1 0.
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, AVDD = +5V, BVDD = +3V, VREF = internal +2.5V, fCLK = 5MHz, and fSAMPLE = 250kSPS, unless otherwise noted. FREQUENCY SPECTRUM (16384 point FFT, fIN = 45kHz, –0.
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, AVDD = +5V, BVDD = +3V, VREF = internal +2.5V, fCLK = 5MHz, and fSAMPLE = 250kSPS, unless otherwise noted. OFFSET OF ALL CHANNELS vs TEMPERATURE OFFSET MATCHING OF CHANNEL PAIRS vs TEMPERATURE 0.25 -0.8 0.20 0.15 C0 A0 A1 -1.0 C1 -1.
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com INTRODUCTION The ADS8365 is a high-speed, low-power, six-channel simultaneous sampling and converting, 16-bit ADC that operates from a single +5V supply. The input channels are fully differential with a typical common-mode rejection of 80dB.
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 +IN CM +VREF +VREF CM Voltage -IN = CM Voltage -VREF t CM -VREF CM +1/2VREF Single-Ended Inputs +IN +VREF CM Voltage -VREF CM -1/2VREF -IN t Differential Inputs NOTES: Common−mode voltage (Differential mode) = (+IN) ) (−IN) .
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com voltage. Essentially, the current into the ADS8365 charges the internal capacitor array during the sampling period. After this capacitance has been fully charged, there is no further input current.
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 THEORY OF OPERATION and all the output registers, aborts any conversion in process, and closes the sampling switches. The reset signal must stay low for at least 20ns (see Figure 27, tW4).
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com START OF A CONVERSION AND READING DATA The ADS8365 can also convert one channel continuously (see Figure 28). Therefore, HOLDA and HOLDC are kept high all the time. To gain acquisition time, the falling edge of HOLDB takes place just before the rising edge of clock.
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 Reading data (RD and CS) CS being low tells the ADS8365 that the bus on the board is assigned to the ADS8365. If an ADC shares a bus with digital gates, there is a possibility that digital (high-frequency) noise will be coupled into the ADC.
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com ADD Signal In the cycle and the FIFO mode, it might be desirable to have address information with the 16-bit output data. Therefore, ADD can be set high.
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 NAP AND POWERDOWN MODE CONTROL In order to minimize power consumption when the ADS8365 is not in use, two low-power options are available. Nap mode minimizes power without shutting down the biasing circuitry and internal reference, allowing immediate recovery after it is disabled.
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 0111111111111111 65535 0111111111111110 65534 0111111111111101 65533 0000000000000001 32769 0000000000000000 32768 1111111111111111 32767 1000000000000010 Step Digital Output Code Binary Two's Complement (BTC) 2 1000000000000001 1 1000000000000000 0 2.
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com LAYOUT For optimum performance, care should be taken with the physical layout of the ADS8365 circuitry. This recommendation is particularly true if the CLK input is approaching the maximum throughput rate.
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 APPLICATION INFORMATION Different connection diagrams to DSPs or microcontrollers are shown in Figure 33 through Figure 39. 5V 5V 2.048V REF3220 AVDD REFIN 100nF 5V V+ -IN REFOUT 100kW 20kW OPA343 SENSE OUT 100W 0.5V to 4.5V CH A0+ VIN A0 +IN 100kW 40kW REF 2 100W 1nF CH A02.
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com 3.3V ADS8365 BVDD BVDD HOLDA HOLDB 26 30 23 55 HOLDC FD WR A0 ADD A1 BYTE A2 CS DVDD 56 PWM1 57 PWM2 58 PWM3 54 EA0 53 EA1 52 31 EA2 EA3 8:1 OE RD EOC CLK RESET IS 29 RE 27 EXT_INT1 28 MCLKX 51 DATA [0] ... DATA [15] C28xx ADC_RST (MFSX) D0 ... D15 48 ...
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 3.3V ADS8365 BVDD BVDD HOLDA 30 53 52 23 54 WR HOLDB A1 HOLDC DVDD 56 TOUT1 57 A2 58 A1 8:1 A2 ADD CS BYTE A0 RD EOC CLK RESET 31 A0 IS OE 55 BE0 29 RE 27 INT0 28 TOUT0 51 DATA [0] ... DATA [15] C67xx DB_CNTL0 (ED27) D0 ... D15 48 ... 33 VSS BGND Figure 36.
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com 3.3V ADS8365 BVDD BVDD HOLDA HOLDB 26 54 53 52 30 23 55 HOLDC FD DVDD 56 TOUT0 57 A2 58 A1 8:1 A0 CS A1 C54xx 31 A0 OE IS 29 A2 RD WR 30 27 ADD EOC BYTE CLK <1 I/OSTRB (1G32) 28 INT0 51 BCLKX1 RESET XF DATA [0] ... DATA [15] D0 ... D15 48 ...
ADS8365 www.ti.com.................................................................................................................................................... SBAS362C – AUGUST 2006 – REVISED MARCH 2008 Part Change Notification # 20071210003 The ADS8365 device underwent a silicon change under Texas Instruments Part Change Notification (PCN) number 20071210003.
ADS8365 SBAS362C – AUGUST 2006 – REVISED MARCH 2008.................................................................................................................................................... www.ti.com Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (November 2006) to Revision C ...........................................................................................
PACKAGE OPTION ADDENDUM www.ti.
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device ADS8365IPAGR Package Package Pins Type Drawing TQFP PAG 64 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 1500 330.0 24.4 Pack Materials-Page 1 13.0 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 13.0 1.5 16.0 24.
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS8365IPAGR TQFP PAG 64 1500 367.0 367.0 45.
MECHANICAL DATA MTQF006A – JANUARY 1995 – REVISED DECEMBER 1996 PAG (S-PQFP-G64) PLASTIC QUAD FLATPACK 0,27 0,17 0,50 48 0,08 M 33 49 32 64 17 0,13 NOM 1 16 7,50 TYP Gage Plane 10,20 SQ 9,80 12,20 SQ 11,80 0,25 0,05 MIN 1,05 0,95 0°– 7° 0,75 0,45 Seating Plane 0,08 1,20 MAX 4040282 / C 11/96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C.
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