Datasheet

www.ti.com
READING DATA
POWER SAVING
FULL POWER-DOWN MODE
ADS8380
SLAS387A NOVEMBER 2004 REVISED DECEMBER 2004
DIGITAL INTERFACE (continued)
The ADS8380 offers a high speed serial interface that is compatible with the SPI protocol. The device outputs
data in either 2's complement format or straight binary format depending on the state of the SB/2C pin. Refer to
Table 1 for the ideal output codes.
Table 1. Input Voltages and Ideal Output Codes
DESCRIPTION ANALOG VALUE +IN (–IN) DIGITAL OUTPUT (HEXADECIMAL)
Full-scale range (+V
REF
) SB/2C Pin = 0 SB/2c Pin = 1
Least significant bit (+V
REF
)/2
18
(LSB)
Full scale V
REF
1 LSB 3FFFF 1FFFF
Mid scale (+V
REF
)/2 20000 00000
Mid scale 1 LSB (+V
REF
)/2 1 LSB 1FFFF 3FFFF
0 0 00000 20000
To avoid performance degradation due to the toggling of device buffers, read operation must not be performed
in the specified quiet zones (t
quiet1
, t
quiet2
, and t
quiet3
). Internal to the device, the previously converted data is
updated with the new data near the fall of BUSY. Hence, the fall of CS and the fall of FS around the fall of BUSY
is constrained. This is specified by t
su2
, t
su3
, t
h2
, and t
h8
in the timing requirements table.
The converter provides two power saving modes, full power down and nap. Refer to Table 2 for information on
activation/deactivation and resumption time for both modes.
Table 2. Power Save
POWER
TYPE OF POWER DOWN SDO ACTIVATED BY ACTIVATION TIME (t
d16
) RESUME POWER BY
CONSUMPTION
Normal operation Not 3 stated 22 mA NA NA NA
Full power down 3 Stated (t
d10
2 µA PD = 1 10 µs PD = 0
(Int Ref, 1-µF capacitor on REFOUT pin) timing)
Full power down 3 Stated (t
d10
2 µA PD = 1 10 µs PD = 0
(Ext Ref, 1-µF capacitor on REFOUT pin) timing)
At EOC and
Nap power down Not 3 stated 3 mA 200 ns Sample Start command
CONVST_QUAL = 0
Full power-down mode is activated by turning off the supply or by asserting PD to 1. See Figure 53 and
Figure 54 . The device can be resumed from full power down by either turning on the power supply or by
de-asserting the PD pin. The first two conversions produce inaccurate results because during this period the
device loads its trim values to ensure the specified accuracy.
If an internal reference is used (with a 1-µF capacitor installed between the REFOUT and REFM pins), the total
resume time (t
d18
) is 25 ms. After the first two conversions, t
d17
(4 ms) is required for the trimmed internal
reference voltage to settle to the specified accuracy. Only then the converted results match the specified
accuracy.
23
Submit Documentation Feedback