ADS8383EVM User’s Guide December 2003 Data Acquistion SLAU119
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of ±6 V and the output voltage range of 0 V and 5.5 V. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Related Documentation From Texas Instruments Preface About This Manual This users guide describes the characteristics, operation, and use of the ADS8383 18-bit, 500 kHz parallel interface analog to digital converter evaluation board. A complete circuit description as well as schematic diagram and bill of materials is included.
Contents FCC Warning This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference.
Contents 1 EVM Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 2 Analog Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 2.1 Signal Conditioning . . . . . . .
Contents 2−1 6−1 6−2 6−3 6−4 Input Buffer Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Top Layer—Layer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ground Plane—Layer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Plane— Layer 3 . . . . . . . . . . . . . . . . . . . . . .
Chapter 1 This chapter contains the features of the ADS8383EVM. Topic 1.1 Page Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features 1.1 Features - Full-featured evaluation board for the high-speed ADS8383 18-bit, single channel, parallel interface SAR type analog to digital converters.
Chapter 2 The ADS8383 analog-to-digital converter has both a positive and negative analog input pin. The EVM provides ground for the negative input close the device via SJP3, or allows a user-furnished ground wire. The negative input pin has a range of –200 mV up to 200 mV, and is shorted on the EVM via SJP3. A signal for the positive input pin can be applied at connector P1, pin 2 (shown in Table 2−1 ), or applied to the center pin of SMA connector J2. Table 2−1.
Signal Conditioning 2.1 Signal Conditioning The factory recommends the analog input to any SAR type converter be buffered and low-pass filtered. It is important to note that the input buffer circuit of the ADS8383EVM, shown in Figure 2−1, utilizes the THS4031 configured as an inverting gain of one. The amplifier is not stable in a conventional a gain-of-one configuration. The THS4031 was selected for it’s low noise, high slew rate and fast settling time.
Reference 2.2 Reference The ADS8383EVM provide an onboard 4.096-V reference circuit. The EVM also has the provision for users to supply a reference voltage via connecter P1 pin 20. This reference voltage may be filtered by installing amplifier U1. The converter itself has onboard reference buffer, therefore it is not necessary to buffer externally. The reference buffer circuit on the EVM is not populated with an amplifier. The EVM allows users to select from two reference sources.
2-4
Chapter 3 The ADS8383EVM is designed for easy interfacing to multiple platforms. Samtec part numbers SSW−110−22−F−D−VS−K and TSM−110−01−T−DV−P provide a convenient dual row header/socket combination at P2 and P3. Consult Samtec at www.samtec.com or 1−800−SAMTEC−9 for a variety of mating connector options. Table 3−1. Pinout for Parallel Control Connector P2 Connector.Pin Signal P2.1 DC_CS Description Daughter card Board Select pin P2.3 P2.5 P2.7 A0 Address line from processor P2.
Table 3−2. Jumper Settings Jumper Settings Reference Designator W1 W2 W3 Description 1−2 2−3 Set A[2..0] = 0x1 to generate RD pulse Installed† Not installed Set A[2..0] = 0x2 to generate RD pulse Not installed Installed Set A[2..0] = 0x3 to generate CONVST pulse Installed† Not installed Set A[2..
Chapter 4 ! "" # $ % The EVM accepts four power supplies. - A dual ±Vs DC supply for the dual supply op−amps. Recommend ±6VDC supply. - A single +5.0 V DC supply for analog section of the board (A/D + Refer- ence). - A single +5.0 V or +3.3 VDC supply for digital section of the board (A/D + address decoder + buffers). There are two ways to provide these voltages. 1) Wire in the voltages at test points on the EVM. See Table 4−1. Table 4−1.
4-2
Chapter 5 & The ADS8383EVM serves three functions 1) As a reference design 2) As a prototype board and 3) As software test platform Topic Page 5.1 As a Reference Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 5.2 As a Prototype Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 5.3 As a Software Test Platform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
As a Reference Board 5.1 As a Reference Board As a reference design, the ADS8383EVM contains the essential circuitry to showcase the analog-to-digital converter. This essential circuitry includes the input amplifier, reference circuit, and buffers. The EVM analog input circuit is optimized for 100 kHz sine wave, therefore users may need to adjust the resistor and capacitor values of the A/D input RC circuit.
Chapter 6 !'('( ) * + # * ! % This chapter contains the ADS8383EVM bill of materials, the layouts, and the schematic. Topic Page 6.1 ADS8383EVM Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 6.2 ADS8383EVM Layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5 6.3 ADS8383EVM Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ADS8383EVM Bill of Materials 6.1 ADS8383EVM Bill of Materials Table 6−1 contains a complete bill of materials for the ADS8383EVM. The schematic diagram is also provided for reference. Contact the Product Information Center or e−mail dataconvapps@list.ti.com for questions regarding this EVM. Table 6−1. ADS8383EVM Bill Of Materials Item No. QTY 1 2 0 R4 R21 Panasonic − ECG or Alternate ERJ−3GEY0R00V Resistor 0 Ω 1/16W 5% 0603 SMD 2 1 0 R1 Panasonic − ECG or Alternate ERJ−6GEY0R00V Resistor 0.
ADS8383EVM Bill of Materials Reference Designators Item No. QTY 19 7 0.1 µF C7 C9 C15 C22 C32 C34 C36 20 4 1 µF 21 2 22 Value Mfg Mfg’s Part Number Description Kemet or Alternate C0805C104J5RACTU Capacitor .10 µF 50V ceramic X7R 0805 C8 C16 C31 C37 Panasonic − ECG or Alternate ECJ−GVB1C105K Capacitor 1 µF 16V ceramic X5R 0805 1 µF C2 C28 Kemet or Alternate C1206C105K3RACTU Capacitor 1.0 µF 25V ceramic X7R 1206 1 0.
ADS8383EVM Bill of Materials Reference Designators Item No. QTY Value 43 1 SN74AHC1G04 DBV U12 Texas Instruments SN74AHC1G04DBVR Single inverter gate 44 1 5X2X.1 J1 Samtec SSW−105−22−S−D−VS 0.025” SMT socket − bottom side of PWB Samtec TSM−105−01−T−D−V−P 0.025” SMT plug − top side of PWB Mfg Mfg’s Part Number Description 45 1 SMA_PCB_MT J2 Johnson Components Inc. 142−0701−301 Right angle SMA connector 46 1 6X2X.1 J4 Samtec SSW−106−22−S−D−VS 0.
ADS8383EVM Layout 6.2 ADS8383EVM Layout Figure 6−1. Top Layer—Layer 1 Figure 6−2.
ADS8383EVM Layout Figure 6−3. Power Plane—Layer 3 Figure 6−4.
ADS8383EVM Schematic 6.3 ADS8383EVM Schematic The schematic follows this page.
