- Texas Instraments Data Acquistion Models ADS8402, ADS8412 EVM User's Guide

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ADS8402/ADS8412EVM

December 2003 Data Acquistion

User’s Guide

SLAU126

Summary of content (31 pages)

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ADS8402/ADS8412EVM User’s Guide December 2003 Data Acquistion SLAU126
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
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EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
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EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of ±6 V and the output voltage range of 0 V and 5.5 V. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.
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Related Documentation From Texas Instruments Preface Read This First About This Manual This users guide describes the characteristics, operation, and use of the ADS8402/ADS8412 16-bit, high speed, parallel interface analog-to-digital converter evaluation board. A complete circuit description as well as a schematic diagram and bill of materials are included.
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Contents FCC Warning This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference.
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Contents Contents 1 EVM Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 2 Analog Interface . . . . . . . . . . . .
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Contents Figures 1-1 5-1 5-2 5-3 5-4 Input Buffer Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Top Layer—Layer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ground Plane—Layer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Plane—Layer 3 . . . . . . . . . . . . . . . . . . . . . . .
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Chapter 1 EVM Overview This chapter contains the features of the ADS8402/ADS8412. Topic Page 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Features 1.1 Features - Full-featured evaluation board for the high-speed ADS8402 (1.25 MSPS) and the ADS8412 (2 MSPS) high speed, 16-bit, single channel, parallel interface SAR-type analog-to-digital converters. - Onboard signal conditioning - Onboard reference - Input and output digital buffer - Onboard decoding for stacking multiple EVMs 1.2 Introduction The ADS8402EVM and ADS8412EVM is a modular or stand alone EVM.
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Chapter 2 Analog Interface The ADS8402/ADS8412EVM analog-to-digital converter has a unipolar differential input. A unipolar differential input is a differential signal (inverting and noninverting input is 180 degrees out of phase) that is level shifted such that the signals levels are always equal to or above zero volts. The peak-to-peak amplitude on each input pin can be as large as the reference voltage. See the respective product data sheet for more information. Topic Page 2.1 Signal Conditioning .
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Signal Conditioning 2.1 Signal Conditioning The ADS8402/ADS8412EVM comes installed with the unity gain buffer (U2) wired for single-ended in to differential out configuration. The common-mode voltage is derived from a REF3040 reference IC and is adjustable using a potentiometer (R9). The common-mode voltage pin of the THS4503 is set to 2 V on the evaluation module. A single-ended input signal can be applied at pin connector P1 or via SMA connectors J2 (noninverting input).
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Reference Figure 2 - 1. Input Buffer Circuit 60 pF 1 kΩ +VCC 0.1 µF THS4503 1 µF 1 kΩ VI +2.048 V 25 Ω + VOCM - + 25 Ω (+) IN 6800 pF ( - ) IN 1 µF 1 kΩ 0.1 µF - VCC 1 kΩ 60 pF 2.2 Reference The EVM allows users to select from three reference sources. The ADS8402/ADS8412EVM provides an onboard 4.096-V reference, U3. The EVM also has the provision for users to supply a reference voltage via connecter P1 pin 20.
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2-4
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Chapter 3 Digital Interface The ADS8402/ADS8412 EVM is designed for easy interfacing to multiple platforms. Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient dual row header/socket combination at P2 and P3. Consult Samtec at www.samtec.com or 1 - 800- SAMTEC- 9 for a variety of mating connector options. Table 3 - 1. Pinout for Parallel Control Connector P2 Connector.Pin Signal Description P2.1 DC_CS Daughter card board select pin P2.3 P2.5 P2.
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Table 3 - 2. Jumper Settings for Decoder Outputs Jumper Settings Reference Designator W2 W5 W4 † Description 1-2 2-3 Set A[2..0] = 0x1 to generate RD pulse Installed † Not installed Set A[2..0] = 0x2 to generate RD pulse Not installed Installed Set A[2..0] = 0x3 to generate CONVST pulse Installed † Not installed Set A[2..0] = 0x4 to generate CONVST pulse Not installed Installed Set A[2..0] = 0x5 to generate RESET pulse Installed † Not installed Set A[2..
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Chapter 4 Power Supply Requirements The EVM accepts four power supplies. - A dual ±Vs dc supply for the dual supply op-amps. Recommend ±7 Vdc supply. - A single +5-Vdc supply for the analog section of the board (A/D + Reference). - A single +5-V or +3.3-Vdc supply for the digital section of the board (A/D + address decoder + buffers). There are two ways to provide these voltages. 1) Wire in the voltages at test points on the EVM. See Table 4 - 1. Table 4 - 1.
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4-2
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Chapter 5 Using the EVM The ADS8402/ADS8412EVM serves three functions: 1) As a reference design 2) As a prototype board 3) As a software test platform Topic Page 5.1 As a Reference Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 5.2 As a Prototype Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 5.3 As a Software Test Platform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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As a Reference Board 5.1 As a Reference Board As a reference design, the ADS8402/ADS8412EVM contains the essential circuitry to showcase the analog-to-digital converter. This essential circuitry includes the input amplifier, reference circuit, and buffers. The EVM analog input circuit is optimized for 100-kHz sine wave. Therefore, users may need to adjust the resistor and capacitor values of the A/D input circuit.
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Chapter 6 ADS8402/ADS8412EVM BOM, Layout, and Schematic This chapter contains the ADS8402/ADS8412EVM bill of materials, the layouts, and the schematics. Topic Page 6.1 ADS8402/ADS8412EVM Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 6.2 ADS8402/ADS8412EVM Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4 6.3 ADS8402/ADS8412EVM Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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ADS9393EVM Bill of Materials 6.1 ADS9393EVM Bill of Materials Table 6 - 1 contains a complete bill of materials for the ADS8402/ADS8412EVM. The schematic diagram is also provided for reference. Contact the Product Information Center or e-mail dataconvapps@list.ti.com for questions regarding this EVM. Table 6 - 1. ADS8402/ADS8412EVM Bill Of Materials Item No. QTY 1 2 0Ω 2 2 3 Footprint Mfg R15, R21 805 Panasonic - ECG or Alternate ERJ-6GEY0R00V RES 0 Ω 1/8 W 5% 0805 SMD 24.
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ADS9393EVM Bill of Materials Item No. QTY 22 4 23 Value Designator Footprint Mfg 10 µF C14, C24, C27, C29 6032 Panasonic ECG or Alternate ECS -T1EC106R Capacitor 10 µF 25-V tantalum TE SMD 1 22 µF C30 805 TDK Corporation C2012X5R0J226M Capacitor CER 22 µF 6.
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ADS8402/ADS8412EVM Layout 6.2 ADS8402/ADS8412EVM Layout Figure 6 - 1. Top Layer—Layer 1 Figure 1.
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ADS8402/ADS8412EVM Layout Figure 6 - 2.
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ADS8402/ADS8412EVM Layout Figure 6 - 3.
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ADS8402/ADS8412EVM Layout Figure 6 - 4.
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ADS8402/ADS8412EVM Schematic 6.3 ADS8402/ADS8412EVM Schematic The following pages contain the schematic for the ADS8402/ADS8412EVM.
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A B C TP9 1 +3.
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A B C -IN 1uF C16 +IN 10k R9 +5VCC 50 2 1 1 100 REF3040 OUT IN U1 R23 R5 R6 NI 22uF C30 R11 NI GND GND REF3040 OUT 3 910 R4 R22 NI 2 NI R8 SJP3 5 6 7 8 1 NI NC VREF NC NC U9 NC TP4 1k R1 GND EN +VIN 1uF C33 4 3 2 1 2 1 2 8 0.1uF C45 C18 NC - VOCM + EXT_REF R10 +VCC 1k C35 SJP4 +VCC -VCC 68pF C34 1k R7 -VCC VOUT+ VOUT- 0.01uF +5VCC 1 3 D 2 4 5 1uF C31 THS4503 U2 C37 1uF 68pF R3 NI 2 2 3 +VCC C7 0.
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A B C D B_CS B_RD B_CONVST B_BYTE B_RESET 1 B_BUSY B_CS B_RD B_CONVST B_BYTE B_RESET +BVDD +AVCC 1 2 3 4 5 6 7 8 100 RP2 2 16 15 14 13 12 11 10 9 C19 10uF C12 10uF L3 GND B1 B2 B3 B4 B5 B6 B7 B8 VCC 0.1uF C64 + + 2 BUSY 0.1uF C25 C24 10uF C14 10uF CS RD CONVST BYTE RESET +VBD SN74AHC1G04DBV 4 U10 +VBD SN74AHC245PWR A1 A2 A3 A4 A5 A6 A7 A8 DIR /OE U5 BLM21AJ601SN1L L4 BLM21AJ601SN1L 5 3 2 W3 R17 10k +VBD C66 0.01uF R19 10k RESET# R18 10k C20 0.01uF 0.