Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal TQFP 48

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FEATURES APPLICATIONS

DESCRIPTION

CDAC

Output

Latches

and

3-State

Drivers

BYTE

16-/8-Bit

Parallel DATA

Output Bus

SAR

Conversion

and

Control Logic

Comparator

Clock

+IN

−IN

REFIN

CONVST

BUSY

RESET

4.096-V

Internal

Reference

REFOUT

ADS8411

SLAS369B – APRIL 2002 – REVISED DECEMBER 2004

16-BIT, 2 MSPS, UNIPOLAR INPUT, MICRO POWER SAMPLING

ANALOG-TO-DIGITAL CONVERTER WITH PARALLEL INTERFACE AND REFERENCE

• DWDM

• 2-MHz Sample Rate

• Instrumentation

• 16-Bit NMC Ensured Over Temperature

• High-Speed, High-Resolution, Zero Latency

• Zero Latency

Data Acquisition Systems

• Unipolar Single-Ended Input Range:

• Transducer Interface

0 V to V

ref

• Medical Instruments

• Onboard Reference

• Communication

• Onboard Reference Buffer

• High-Speed Parallel Interface

• Power Dissipation: 175 mW at 2 MHz Typ

The ADS8411 is a 16-bit, 2 MHz A/D converter with

• Wide Digital Supply

an internal 4.096-V reference. The device includes a

16-bit capacitor-based SAR A/D converter with in-

• 8-/16-Bit Bus Transfer

herent sample and hold. The ADS8411 offers a full

• 48-Pin TQFP Package

16-bit interface and an 8-bit option where data is read

• ESD Sensitive – HBM Capability of 500 V,

using two 8-bit read cycles.

1000 V at All Input Pins

The ADS8411 has a unipolar single-ended input. It is

available in a 48-lead TQFP package and is

characterized over the industrial -40 ° C to 85 ° C tem-

perature range.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (29 pages)

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ADS8411 SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 16-BIT, 2 MSPS, UNIPOLAR INPUT, MICRO POWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH PARALLEL INTERFACE AND REFERENCE FEATURES APPLICATIONS • • • • • • • • • • • • • • • 2-MHz Sample Rate 16-Bit NMC Ensured Over Temperature Zero Latency Unipolar Single-Ended Input Range: 0 V to Vref Onboard Reference Onboard Reference Buffer High-Speed Parallel Interface Power Dissipation: 175 mW at 2 MHz Typ Wide Digital Supp
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 SPECIFICATIONS TA = –40°C to 85°C, +VA = 5 V, +VBD = 3 V or 5 V, Vref = 4.096 V, fSAMPLE = 2 MHz (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ANALOG INPUT Full-scale input voltage (1) +IN – (–IN) Absolute input voltage 0 Vref +IN –0.2 Vref + 0.2 –IN –0.2 0.2 V V Input capacitance 25 pF Input leakage current 0.
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 SPECIFICATIONS (continued) TA = –40°C to 85°C, +VA = 5 V, +VBD = 3 V or 5 V, Vref = 4.096 V, fSAMPLE = 2 MHz (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 120 ms INTERNAL REFERENCE OUTPUT Vref Internal reference start-up time From 95% (+VA), with 1 µF storage capacitor Reference voltage IOUT = 0 Source current Static load Line regulation +VA = 4.75 ~ 5.25 V 0.6 mV Drift IOUT = 0 36 PPM/°C 4.
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 Terminal Functions NAME NO. I/O AGND 5, 8, 11, 12, 14, 15, 44, 45 – Analog ground BDGND DESCRIPTION 25, 35 – Digital ground for bus interface digital supply BUSY 36 O Status output. High when a conversion is in progress. BYTE 39 I Byte select input. Used for 8-bit bus reading. 0: No fold back 1: Low byte D[7:0] of the 16 most significant bits is folded back to high byte of the 16 most significant pins DB[15:8].
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 TIMING DIAGRAMS (continued) tw1 tw2 CONVST (used in normal conversion) tcycle CONVST (used in ABORT) tsu(AB) tpd1 tsu(AB) tpd2 tw4 tpd1 tw3 BUSY CS = 0 CONVERT† tCONV tCONV t(ACQ) SAMPLING† (When CS = 0) BYTE tsu4 th1 th2 RD tdis ten Data to be read† th4 DB[15:8] DB[7:0] †Signal Invalid Invalid Previous Conversion Current Conversion tsu5 Hi−Z Hi−Z D [15:8] D [7:0] D [7:0] Hi−Z Hi−Z internal to device Figure 3.
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 TYPICAL CHARACTERISTICS At –40°C to 85°C, +VA = 5 V, +VBD = 5 V, REFIN = 4.096 V (internal reference used) and fsample = 2 MHz (unless otherwise noted) HISTOGRAM (DC CODE SPREAD) vs FULL SCALE 131071 CONVERSIONS SIGNAL-TO-NOISE RATIO vs FREE-AIR TEMPERATURE 70000 86.8 +VA = 5 V, +VBD = 3.3 V Code = 65235 86.6 SNR − Signal-to-Noise Ratio − dB 60000 50000 40000 30000 20000 10000 86.4 86.2 86 85.8 85.6 85.4 85.
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 TYPICAL CHARACTERISTICS (continued) SPURIOUS FREE DYNAMIC RANGE vs FREE-AIR TEMPERATURE TOTAL HARMONIC DISTORTION vs FREE-AIR TEMPERATURE −91 fi = 100 kHz, +VA = 5 V, +VBD = 3.3 V, TA = 25°C, Internal Reference 95 94.5 THD − Total Harmonic Distortion − dB SFDR − Spurious Free Dynamic Range − dB 95.5 94 93.5 93 92.5 92 −40 −20 0 20 40 60 TA − Free-Air Temperature − °C −92.5 −93 −93.
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 TYPICAL CHARACTERISTICS (continued) SIGNAL-TO-NOISE AND DISTORTION vs INPUT FREQUENCY SPURIOUS FREE DYNAMIC RANGE vs INPUT FREQUENCY 103 +VA = 5 V, +VBD = 3.3 V, TA = 25°C, Internal Reference 85 SFDR − Spurious Free Dynamic Range − dB SINAD − Signal-to-Nois and Distortion − dB 85.50 84.50 84 83.50 83 82.50 0 20 40 60 80 101 100 99 98 97 96 95 94 100 +VA = 5 V, +VBD = 3.
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 TYPICAL CHARACTERISTICS (continued) GAIN ERROR vs SUPPLY VOLTAGE OFFSET ERROR vs SUPPLY VOLTAGE 0.45 0.25 +VBD = 3.3 V, TA = 25°C, External Reference 0.35 EO − Offset Error − mV E G − Gain Error − mV 0.20 +VB D= 3.3 V, TA = 25°C, External Reference 0.40 0.15 0.10 0.30 0.25 0.20 0.15 0.10 0.05 0.05 0 4.75 4.85 4.95 5.05 5.15 VDD − Supply Voltage − V 0 4.75 5.25 Figure 18. Figure 19.
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 TYPICAL CHARACTERISTICS (continued) OFFSET ERROR vs FREE-AIR TEMPERATURE 0.5 33.6 +VA = 5 V, +VBD = 3.3 V, External Reference 0.3 0.2 0.1 0 −0.1 33 32.8 32.6 32.4 −0.3 32.2 −20 0 20 40 60 TA − Free-Air Temperature − °C 32 −40 80 Figure 23. DIFFERENTIAL NONLINEARITY vs FREE-AIR TEMPERATURE INTEGRAL NONLINEARITY vs FREE-AIR TEMPERATURE INL − Integral Nonlinearity − LSBs Max 1 0 80 2.5 1.5 0.
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 TYPICAL CHARACTERISTICS (continued) DNL 4 3 DNL − LSBs 2 1 0 −1 −2 −3 −4 0 32768 Code Figure 26. 16384 49152 65536 49152 65536 INL 4 3 INL − LSBs 2 1 0 −1 −2 −3 −4 0 32768 Code Figure 27. 16384 FFT Magnitude − dB 0 −20 −40 −60 −80 −100 −120 −140 −160 −180 0 100 200 300 400 500 600 Frequency − kHz Figure 28.
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 APPLICATION INFORMATION MICROCONTROLLER INTERFACING ADS8411 to 8-Bit Microcontroller Interface Figure 29 shows a parallel interface between the ADS8411 and a typical microcontroller using the 8-bit data bus. The BUSY signal is used as a falling-edge interrupt to the microcontroller. Analog 5 V 0.1 µF AGND 10 µF Ext Ref Input 0.
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ADS8411 SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 www.ti.com PRINCIPLES OF OPERATION (continued) The analog input is provided to two input pins: +IN and –IN. When a conversion is initiated, the differential input on these pins is sampled on the internal capacitor array. While a conversion is in progress, both inputs are disconnected from any internal function. REFERENCE The ADS8411 can operate with an external reference with a range from 3.9 V to 4.2 V. A 4.096-V internal reference is included.
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 PRINCIPLES OF OPERATION (continued) Reading Data The ADS8411 outputs full parallel data in straight binary format as shown in Table 1. The parallel output is active when CS and RD are both low. There is a minimal quiet zone requirement around the falling edge of CONVST. This is 50 ns prior to the falling edge of CONVST and 40 ns after the falling edge. No data read should be attempted within this zone.
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ADS8411 www.ti.com SLAS369B – APRIL 2002 – REVISED DECEMBER 2004 POWER-ON INITIALIZATION RESET is not required after power on. An internal power-on-reset circuit generates the reset. To ensure that all of the registers are cleared, the three conversion cycles must be given to the converter after power on. LAYOUT For optimum performance, care should be taken with the physical layout of the ADS8411 circuitry.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADS8411IBPFBR TQFP PFB 48 1000 330.0 16.4 9.6 9.6 1.5 12.0 16.0 Q2 ADS8411IBPFBT TQFP PFB 48 250 330.0 16.4 9.6 9.6 1.5 12.0 16.0 Q2 ADS8411IPFBT TQFP PFB 48 250 330.0 16.4 9.6 9.6 1.5 12.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS8411IBPFBR TQFP PFB 48 1000 367.0 367.0 38.0 ADS8411IBPFBT TQFP PFB 48 250 367.0 367.0 38.0 ADS8411IPFBT TQFP PFB 48 250 367.0 367.0 38.
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MECHANICAL DATA MTQF019A – JANUARY 1995 – REVISED JANUARY 1998 PFB (S-PQFP-G48) PLASTIC QUAD FLATPACK 0,27 0,17 0,50 36 0,08 M 25 37 24 48 13 0,13 NOM 1 12 5,50 TYP 7,20 SQ 6,80 9,20 SQ 8,80 Gage Plane 0,25 0,05 MIN 0°– 7° 1,05 0,95 Seating Plane 0,75 0,45 0,08 1,20 MAX 4073176 / B 10/96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.