Datasheet

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PRINCIPLES OF OPERATION

REFERENCE

ADS8484

REFIN

REFM

0.1 Fm

100 W

REF3240

830pF

ToCDAC

10kW

300pF

REFIN

REFM

ADS8484

SLAS511 – NOVEMBER 2007

The ADS8484 is a high-speed successive approximation register (SAR) analog-to-digital converter (ADC). The

architecture is based on charge redistribution which inherently includes a sample/hold function. See Figure 36 for

the application circuit for the ADS8484.

The conversion clock is generated internally. The conversion time of 610 ns is capable of sustaining a 1.25-MHz

throughput.

The analog input is provided to two input pins: +IN and – IN. When a conversion is initiated, the differential input

on these pins is sampled on the internal capacitor array. While a conversion is in progress, both inputs are

disconnected from any internal function.

The ADS8484 can operate with an external reference with a range from 3.0 V to 4.2 V. The reference voltage on

the input pin 13 (REFIN) of the converter is internally buffered. A clean, low noise, well-decoupled reference

voltage on this pin is required to ensure good performance of the converter. A low noise band-gap reference like

the REF3240 can be used to drive this pin. A 0.1- µ F decoupling capacitor is required between REFIN and REFM

pins (pin 13 and pin 12) of the converter. This capacitor should be placed as close as possible to the pins of the

device. Designers should strive to minimize the routing length of the traces that connect the terminals of the

capacitor to the pins of the converter. An RC network can also be used to filter the reference voltage. A 100- Ω

series resistor and a 0.1- µ F capacitor, which can also serve as the decoupling capacitor can be used to filter the

reference voltage.

Figure 38. ADS8484 Using External Reference

The ADS8484 also has limited low pass filtering capability built into the converter. The equivalent circuitry on the

REFIN input ia as shown in Figure 39 .

Figure 39. Simplified Reference Input Circuit

The REFM input of the ADS8484 should always be shorted to AGND. A 4.096-V internal reference is included.

When internal reference is used, pin 14 (REFOUT) is connected to pin 13 (REFIN) with an 0.1- µ F decoupling

capacitor and 1- µ F storage capacitor between pin 14 (REFOUT) and pins 11 and 12 (REFM) (see Figure 37 ).

The internal reference of the converter is double buffered. If an external reference is used, the second buffer

provides isolation between the external reference and the CDAC. This buffer is also used to recharge all of the

capacitors of the CDAC during conversion. Pin 14 (REFOUT) can be left unconnected (floating) if external

reference is used.

Product Folder Link(s): ADS8484