Datasheet

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ANALOG INPUT

ADS8484

SLAS511 – NOVEMBER 2007

When the converter enters the hold mode, the voltage difference between the +IN and – IN inputs is captured on

the internal capacitor array. Both +IN and – IN input has a range of – 0.2 V to V

ref

+ 0.2 V. The input span [+IN –

( – IN)] is limited to – V

ref

to V

ref

The input current on the analog inputs depends upon a number of factors: sample rate, input voltage, and source

impedance. Essentially, the current into the ADS8484 charges the internal capacitor array during the sample

period. After this capacitance has been fully charged, there is no further input current. The source of the analog

input must be able to charge the input capacitance (65 pF) to an 18-bit settling level within the acquisition time

(175 ns) of the device. When the converter goes into the hold mode, the input impedance is greater than 1 G Ω .

Care must be taken regarding the absolute analog input voltage. To maintain the linearity of the converter, the

+IN and – IN inputs and the span [+IN – ( – IN)] must be within the limits specified. Outside of these ranges, the

converter's linearity may not meet specifications. To minimize noise, low bandwidth input signals with low-pass

filters are used.

Care must be taken to ensure that the output impedance of the sources driving the +IN and – IN inputs are

matched. If this is not observed, the two inputs could have different setting times. This may result in offset error,

gain error, and linearity error which varies with temperature and input voltage.

The analog input to the converter needs to be driven with a low noise, high-speed op-amp like the THS4031. An

RC filter is recommended at the input pins to low-pass filter the noise from the source. The input to the converter

is a uni-polar input voltage in the range 0 to V

ref

. The THS4031 can be used in the source follower configuration

to drive the converter.

Product Folder Link(s): ADS8484