Datasheet

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Reading Data
ADS8484
SLAS511 – NOVEMBER 2007
Conversions are initiated by bringing the CONVST pin low for a minimum of 20 ns (after the 20 ns minimum
requirement has been met, the CONVST pin can be brought high), while CS is low. The ADS8484 switches from
the sample to the hold mode on the falling edge of the CONVST command. A clean and low jitter falling edge of
this signal is important to the performance of the converter. The BUSY output is brought high immediately
following CONVST going low. BUSY stays high throughout the conversion process and returns low when the
conversion has ended.
Sampling starts t
pd
ns before the falling edge of the BUSY signal when CS is tied low or starts with the falling
edge of CS when BUSY is low.
Both RD and CS can be high during and before a conversion with one exception ( CS must be low when
CONVST goes low to initiate a conversion). Both the RD and CS pins are brought low in order to enable the
parallel output bus with the conversion.
The ADS8484 outputs full parallel data in two's complement format as shown in Table 1 . The parallel output is
active when CS and RD are both low. There is a minimal quiet zone requirement around the falling edge of
CONVST. This is 50 ns prior to the falling edge of CONVST and 40 ns after the falling edge. No data read should
attempted within this zone. Any other combination of CS and RD sets the parallel output to 3-state. BYTE and
BUS18/ 16 are used for multiword read operations. BYTE is used whenever lower bits on the bus are output on
the higher byte of the bus. BUS18/ 16 is used whenever the last two bits on the 18-bit bus is output on either
bytes of the higher 16-bit bus. Refer to Table 1 for ideal output codes.
Table 1. Ideal Input Voltages and Output Codes
DESCRIPTION ANALOG VALUE DIGITAL OUTPUT TWO'S COMPLEMENT
Full scale range +V
ref
Least significant bit (LSB) 2 × (+V
ref
)/262144 BINARY CODE HEX CODE
+Full scale (+V
ref
) – 1 LSB 01 1111 1111 1111 1111 1FFFF
Midscale 0 V 00 0000 0000 0000 0000 00000
Midscale – 1 LSB 0 V – 1 LSB 11 1111 1111 1111 1111 3FFFF
Zero – V
ref
10 0000 0000 0000 0000 20000
The output data is a full 18-bit word (D17 – D0) on DB17 – DB0 pins (MSB – LSB) if both BUS18/ 16 and BYTE are
low.
The result may also be read on an 16-bit bus by using only pins DB17 – DB2. In this case two reads are
necessary: the first as before, leaving both BUS18/ 16 and BYTE low and reading the 16 most significant bits
(D17 – D2) on pins DB17 – DB2, then bringing BUS18/ 16 high while holding BYTE low. When BUS18/ 16 is high,
the lower two bits (D1 – D0) appear on pins DB3 – DB2.
The result may also be read on an 8-bit bus for convenience. This is done by using only pins DB17 – DB10. In this
case three reads are necessary: the first as before, leaving both BUS18/ 16 and BYTE low and reading the 8
most significant bits on pins DB17 – DB10, then bringing BYTE high while holding BUS18/ 16 low. When BYTE is
high, the medium bits (D9 – D2) appear on pins DB17 – DB10. The last read is done by bringing BUS18/ 16 high
while holding BYTE high. When BUS18/ 16 is high, the lower two bits (D1 – D0) appear on pins DB11 – DB10. The
last read cycle is not necessary if only the first 16 most significant bits are of interest.
All of these multiword read operations can be performed with multiple active RD (toggling) or with RD held low
for simplicity. This is referred to as the AUTO READ operation.
Table 2. Conversion Data Read Out
DATA READ OUT
BYTE BUS18/ 16
PINS PINS PINS PINS PINS
DB17 – DB12 DB11 – DB10 DB9 – DB4 DB3 – DB2 DB1 – DB0
High High All One's D1 – D0 All One's All One's All One's
Low High All One's All One's All One's D1 – D0 All One's
High Low D9 – D4 D3 – D2 All One's All One's All One's
Low Low D17 – D12 D11 – D10 D9 – D4 D3 – D2 D1 – D0
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