Datasheet

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SPECIFICATIONS (Continued)
ADS8484
SLAS511 – NOVEMBER 2007
T
A
= – 40 ° C to 85 ° C, +VA = 5 V, +VBD = 3 V or 5 V, V
ref
= 4.096 V, f
SAMPLE
= 1.25 MSPS (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOLTAGE REFERENCE INPUT
V
ref
Reference voltage at REFIN 3.0 4.096 +VA – 0.8 V
Reference resistance
(1)
500 k Ω
Reference current drain f
s
= 1.25 MHz 1 mA
INTERNAL REFERENCE OUTPUT
Internal reference start-up time From 95% (+VA), with 1- µ F 120 ms
storage capacitor
V
ref
Reference voltage range I
O
= 0 4.081 4.096 4.111 V
Source current Static load 10 µ A
Line regulation +VA = 4.75 V ~ 5.25 V 60 µ V
Drift I
O
= 0 ± 6 PPM/ ° C
DIGITAL INPUT/OUTPUT
Logic family – CMOS
V
IH
High-level input voltage I
IH
= 5 µ A +VBD – 1 +VBD + 0.3
V
IL
Low-level input voltage I
IL
= 5 µ A – 0.3 0.8
V
V
OH
High-level output voltage I
OH
= 2 TTL loads +VBD – 0.6
V
OL
Low-level output voltage I
OL
= 2 TTL loads 0.4
Data format – Two's Complement
POWER SUPPLY REQUIREMENTS
+VBD 2.7 3.3 5.25 V
Power supply voltage
+VA 4.75 5 5.25 V
Supply current
(2)
f
s
= 1.25 MHz 47 52 mA
Power dissipation
(2)
f
s
= 1.25 MHz 235 260 mW
TEMPERATURE RANGE
Operating free-air – 40 85 ° C
(1) Can vary ± 20%
(2) This includes only +VA current. +VBD current is typical 1 mA with 5-pF load capacitance on all output pins.
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