Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal SOIC 20

Successive Approximation Register

Clock

Comparator

CDAC

Buffer

REF

CAP

10 kΩ

4.9 kΩ

Internal

+2.5 V Ref

4 kΩ

Serial

Data

Out

Control

BUSY

DATACLK

DATA

2.5 kΩ

9.8 kΩ

EXT/INT

R/C

SB/BTC

PWRD

ADS8509

www.ti.com

SLAS324C –OCTOBER 2004–REVISED APRIL 2010

16-BIT 250-KSPS SERIAL CMOS SAMPLING ANALOG-TO-DIGITAL CONVERTER

Check for Samples: ADS8509

FEATURES

DESCRIPTION

• 250-kHz Sampling Rate

The ADS8509 is a complete 16-bit sampling

analog-to-digital (A/D) converter using state-of-the-art

• 4-V, 5-V, 10-V, ±3.33-V, ±5-V, and ±10-V Input

CMOS structures. It contains a complete 16-bit,

Ranges

capacitor-based, successive approximation register

• ±2 LSB Max INL

(SAR) A/D converter with sample-and-hold,

• ±1 LSB Max DNL, 16-Bit No Missing Codes

reference, clock, and a serial data interface. Data can

be output using the internal clock or can be

• SPI Compatible Serial Output with Daisy-Chain

synchronized to an external data clock. The ADS8509

(TAG) Feature

also provides an output synchronization pulse for

• Single 5-V Supply

ease of use with standard DSP processors.

• Pin-Compatible with ADS7809 (Low Speed)

The ADS8509 is specified at a 250-kHz sampling rate

and 12-Bit ADS8508/7808

over the full temperature range. Precision resistors

• Uses Internal or External Reference

provide various input ranges including ±10 V and 0 V

• 70-mW Typ Power Dissipation at 250 KSPS

to 5 V, while the innovative design allows operation

from a single +5-V supply with power dissipation

• 20-Pin SO and 28-Pin SSOP Packages

under 100 mW.

• Simple DSP Interface

The ADS8509 is available in 20-pin SO and 28-pin

SSOP packages, both fully specified for operation

APPLICATIONS

over the industrial -40°C to 85°C temperature range.

• Industrial Process Control

• Data Acquisition Systems

• Digital Signal Processing

• Medical Equipment

• Instrumentation

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (31 pages)

PAGE 1
ADS8509 www.ti.com SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 16-BIT 250-KSPS SERIAL CMOS SAMPLING ANALOG-TO-DIGITAL CONVERTER Check for Samples: ADS8509 FEATURES DESCRIPTION • • The ADS8509 is a complete 16-bit sampling analog-to-digital (A/D) converter using state-of-the-art CMOS structures. It contains a complete 16-bit, capacitor-based, successive approximation register (SAR) A/D converter with sample-and-hold, reference, clock, and a serial data interface.
PAGE 2
ADS8509 SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 3
ADS8509 www.ti.com SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 ELECTRICAL CHARACTERISTICS At TA = –40°C to 85°C, fs = 250 kHz, VDIG = VANA = 5 V, using internal reference and 0.1%, 0.
PAGE 4
ADS8509 SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) At TA = –40°C to 85°C, fs = 250 kHz, VDIG = VANA = 5 V, using internal reference and 0.1%, 0.25-W fixed resistors (see Figure 29 and Figure 30) (unless otherwise specified) PARAMETER TEST CONDITIONS ADS8509I ADS8509IB MIN TYP MAX MIN TYP MAX 2.48 2.5 2.52 2.48 2.5 2.
PAGE 5
ADS8509 www.ti.
PAGE 6
ADS8509 SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 www.ti.com Terminal Functions TERMINAL NAME AGND1 DESCRIPTION DB NO. DW NO. I/O 2 2 – Analog ground. Used internally as ground reference point. Minimal current flow. AGND2 9 7 – Analog ground BUSY 25 17 O Busy output. Falls when a conversion is started and remains low until the conversion is completed and the data is latched into the output shift register. CAP 6 5 – Reference buffer capacitor. 2.2-mF Tantalum to ground.
PAGE 7
ADS8509 www.ti.com SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 TIMING REQUIREMENTS, TA = –40°C to 85°C PARAMETER MIN TYP MAX 6 20 ns 2.2 ms Pulse duration, convert td1 Delay time, BUSY from R/C low tw2 Pulse duration, BUSY low td2 Delay time, BUSY, after end of conversion 5 ns td3 Delay time, aperture 5 ns tconv Conversion time tacq Acquisition time tconv + tacq 40 UNIT tw1 ns 2.2 1.
PAGE 8
ADS8509 SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 www.ti.
PAGE 9
ADS8509 www.ti.
PAGE 10
ADS8509 SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 www.ti.
PAGE 11
ADS8509 www.ti.com SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 Tag 18 Tag 17 Tag 16 Tag 15 Tag 1 TAG Tag 2 Bit 15 (MSB) DATA Tag 0 t c2 t su2 t su1 0 SYNC BUSY R/C CS External DATACLK t w1 t su2 t d1 t w3 t d7 1 t c2 t w4 2 t d8 3 Bit 14 4 Bit 1 17 18 Bit 0 (LSB) Tag 0 t d9 Tag 1 Tag 19 PARAMETER MEASUREMENT INFORMATION (continued) Figure 8.
PAGE 12
ADS8509 SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 www.ti.com Tag 18 Tag 17 Tag 1 TAG Tag 16 Bit 15 (MSB) DATA SYNC t d1 BUSY R/C CS External DATACLK t su2 t w3 t c2 t w1 t w4 t su1 t su1 Tag 0 t c2 t d8 t d10 Bit 0 (LSB) Tag 0 t d8 Tag 1 Tag 19 PARAMETER MEASUREMENT INFORMATION (continued) Figure 9.
PAGE 13
ADS8509 www.ti.com SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION vs FREE-AIR TEMPERATURE −100 105 THD − Total Harmonic Distortion − dB SFDR − Spurious Free Dynamic Range − dB SPURIOUS FREE DYNAMIC RANGE vs FREE-AIR TEMPERATURE 100 95 90 85 fs = 250 KSPS, fi = 20 kHz 80 75 −40 25 −95 −90 −85 −80 fs = 250 KSPS, fi = 20 kHz −75 −70 −40 85 TA − Free-Air Temperature − 5C Figure 11.
PAGE 14
ADS8509 SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) 105 −105 100 95 90 85 80 75 −100 −95 −90 −85 −80 −75 −70 70 1 10 fi − Input Frequency − kHz 1 100 100 Figure 16. Figure 17. INTERNAL REFERENCE VOLTAGE vs FREE-AIR TEMPERATURE BIPOLAR ZERO SCALE ERROR vs FREE-AIR TEMPERATURE 2.510 5 2.508 4 2.506 2.504 2.502 2.500 2.498 2.496 2.494 2.
PAGE 15
ADS8509 www.ti.com SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 TYPICAL CHARACTERISTICS (continued) PERFORMANCE vs CAP PIN CAPACITOR ESR HISTOGRAM 8192 Conversions of a DC Input 4000 3500 100 4224 95 |THD| 90 Performance 4500 Hits 3000 2500 2082 2000 1484 1500 80 75 70 65 1000 60 500 4 0 SINAD 85 −3 −2 −1 0 1 2 2.2 µF Capacitor on CAP Pin (pin 6) 55 238 149 11 3 50 0 1 2 Code Figure 22. 3 4 5 6 7 8 9 ESR − Resistance − W 10 11 Figure 23. INTEGRAL NONLINEARITY 2.
PAGE 16
ADS8509 SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) FFT (20-kHz Input) 20 8192 Points, fs = 250 KSPS, fi = 20 kHz, 0 dB SINAD = 86.0 dB, THD = −98.7 dB 0 −20 Amplitude − dB −40 −60 −80 −100 −120 −140 −160 −180 0 25 50 75 100 125 f − Frequency − kHz Figure 26. BASIC OPERATION Two signals control conversion in the ADS8509: CS and R/C. These two signals are internally ORed together.
PAGE 17
ADS8509 www.ti.com SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 When EXT/INT is set high, the R/C and CS signals control the read state. When the read state is initiated, the result from the previously completed conversion is shifted out the DATA pin synchronous to the external clock that is connected to the DATACLK pin. Each bit is available on a falling and then a rising edge. The maximum external clock speed of 28.
PAGE 18
ADS8509 SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 Processor ADS8509A DATA CS R/C DATACLK TAG SCLK www.ti.
PAGE 19
ADS8509 www.ti.com SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 The external reference voltage can vary from 2.3 V to 2.7 V. The reference voltage determines the size of the least significant bit (LSB). The larger reference voltages produce a larger LSB, which can improve SNR. Smaller reference voltages can degrade SNR. +15V 2.2 mF 22 pF ADS8509 200 W 100 nF GND R1IN 2 kW Pin 7 2 kW Vin Pin 2 22 pF Pin3 AGND1 Pin 1 100 W − OPA 627 or OPA 132 + R2IN Pin 6 33.2 kW GND R3IN Pin4 CAP 2.
PAGE 20
ADS8509 SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 www.ti.com Table 2. Input Range Connections (See Figure 29 and Figure 30 for Complete Information) ANALOG INPUT RANGE CONNECT R1IN VIA 200 Ω TO CONNECT R2IN VIA 100 Ω TO CONNECT R3 TO IMPEDANCE ±10 V VIN AGND CAP 11.5 kΩ ±5 V AGND VIN CAP 6.7 kΩ ±3.33 V VIN VIN CAP 5.4 kΩ 0 V to 10 V AGND VIN AGND 6.7 kΩ 0 V to 5 V AGND AGND VIN 5.0 kΩ 0 V to 4 V VIN AGND VIN 5.4 kΩ Table 3.
PAGE 21
ADS8509 www.ti.com SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 Input Range With Trim (Adjust Offset First at 0 V, Then Adjust Gain) Without Trim 200 Ω 200 Ω R1IN R1IN AGND1 AGND1 100 Ω 100 Ω 0 V − 10 V VIN R2IN 33.2 kΩ R3IN R2IN VIN 33.2 kΩ 2.2 µF +5V CAP + 50 kΩ 2.2 µF + R3IN 2.2 µF + +5V CAP 576 kΩ 50 kΩ REF REF + 2.2 µF AGND2 200 Ω AGND2 200 Ω R1IN R1IN AGND1 100 Ω 100 Ω R2IN 33.2 kΩ VIN +5 V CAP 2.2 µF + +5 V 50 kΩ 2.2 µF REF 2.2 µF R2IN 33.
PAGE 22
ADS8509 SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 www.ti.com With Trim (Adjust Offset First at 0 V, Then Adjust Gain) Without Trim Input Range 200 Ω VIN 200 Ω R1IN R1IN VIN AGND1 AGND1 100 Ω 100 Ω R2IN ±10 V R2IN +5 V R3IN 33.2 kΩ + 2.2 F + R3IN +5 V 50 kΩ CAP 2.2 F 33.2 kΩ REF 2.2 µF 576 kΩ + 2.2 µF + CAP REF 50 kΩ AGND2 AGND2 200 Ω 200 Ω R1IN R1IN AGND1 AGND1 100 Ω VIN 33.2 kΩ ±5V R3IN CAP 50 kΩ 2.2 µF + 2.2 µF R2IN R3IN + 2.
PAGE 23
ADS8509 www.ti.com SLAS324C – OCTOBER 2004 – REVISED APRIL 2010 REVISION HISTORY Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (April 2007) to Revision C Page • Deleted Lead Temperature from Absolute Maximum Ratings .............................................................................................. 2 • Changed SB/BTC pin from "O" to "I" ........................................................................................
PAGE 24
PACKAGE OPTION ADDENDUM www.ti.
PAGE 25
PACKAGE OPTION ADDENDUM www.ti.com 28-Oct-2010 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
PAGE 26
PACKAGE MATERIALS INFORMATION www.ti.com 3-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device ADS8509IBDBR Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SSOP DB 28 2000 330.0 16.4 8.1 10.4 2.5 12.0 16.0 Q1 ADS8509IBDWR SOIC DW 20 2000 330.0 24.4 10.8 13.3 2.7 12.0 24.0 Q1 ADS8509IDBR SSOP DB 28 2000 330.0 16.4 8.1 10.4 2.5 12.0 16.
PAGE 27
PACKAGE MATERIALS INFORMATION www.ti.com 3-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS8509IBDBR SSOP DB 28 2000 367.0 367.0 38.0 ADS8509IBDWR SOIC DW 20 2000 367.0 367.0 45.0 ADS8509IDBR SSOP DB 28 2000 367.0 367.0 38.0 ADS8509IDWR SOIC DW 20 2000 367.0 367.0 45.
PAGE 28
PAGE 29
PAGE 30
MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 31
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.