Datasheet

BASIC OPERATION
PARALLEL OUTPUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ADS8517
+5 V
+
+
ConvertPulse
40nsmin
0.1 mF 10 mF
+
NOTE:(1)NC=notconnected.
B11B12B13B14B15
(MSB)
Pin21
LOW
B3B4B5B6B7Pin21
HIGH
NC
(1)
B8B9B10
B0
(LSB)
B1B2
BUSY
R/C
BYTE
±10 V
2.2 Fm
+5V
2.2 Fm
+1.8V
0.1 Fm
ADS8517
SLAS527A SEPTEMBER 2008 REVISED JUNE 2009 .................................................................................................................................................
www.ti.com
Figure 28 shows a basic circuit for operating the ADS8517 with a ± 10-V input range and parallel output. Taking
R/ C (pin 22) low for a minimum of 40 ns (5 µ s max) initiates a conversion. BUSY (pin 24) goes low and stays low
until the conversion completes and the output register updates. If BYTE (pin 21) is low, the eight most significant
bits (MSBs) will be valid when BUSY rises; if BYTE is high, the eight least significant bits (LSBs) will be valid
when BUSY rises. Data are output in binary twos complement (BTC) format. BUSY going high can be used to
latch the data. After the first byte has been read, BYTE can be toggled, allowing the remaining byte to be read.
All convert commands are ignored while BUSY is low.
The ADS8517 begins tracking the input signal at the end of the conversion. Allowing 5 µ s between convert
commands assures accurate acquisition of a new signal.
Figure 28. Basic ± 10-V Operation, Both Parallel and Serial Output
12 Submit Documentation Feedback Copyright © 2008 2009, Texas Instruments Incorporated
Product Folder Link(s): ADS8517