Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal SSOP 28

Successive Approximation Register

Clock

Comparator

CDAC

Buffer

REF

CAP

25.67kΩ

7kΩ

Internal

+4.096V Ref

4kΩ

Serial

Data

Out

and

Control

BUSY

DATACLK

DATA

2.87kΩ

7kΩ

EXT/INT

R/C

SB/BTC

PWRD

TAG

ADS8519

www.ti.com

SLAS462D –JUNE 2007–REVISED SEPTEMBER 2010

16-Bit, 250kSPS, Serial, CMOS, Sampling

ANALOG-TO-DIGITAL CONVERTER

Check for Samples: ADS8519

FEATURES

DESCRIPTION

• 0V to 8.192V, ±5V, and ±10V Input Ranges

The ADS8519 is a complete 16-bit sampling

analog-to-digital (A/D) converter using state-of-the-art

• 93dB SNR with 20kHz Input

CMOS structures. It contains a complete 16-bit,

• ±1.5LSB Max INL

capacitor-based, successive approximation register

• ±1LSB Max DNL; 16 Bits, No Missing Codes

(SAR) A/D converter with sample-and-hold,

• SPI™-Compatible Serial Output with reference, clock, and a serial data interface. Data can

be output using the internal clock or synchronized to

Daisy-Chain (TAG) Feature and 3-State Bus

an external data clock. The ADS8519 also provides

• 5V Analog Supply, 1.65V to 5.25V I/O Supply

an output synchronization pulse for ease-of-use with

• Pinout Similar to 16-Bit ADS7809 (Low-Speed)

standard DSP processors.

and 12-Bit ADS7808 and ADS8508

The ADS8519 is specified at a 250kSPS sampling

• No External Precision Resistors Required

rate over the full temperature range. Internal precision

• Uses Internal or External Reference

resistors provide various input ranges including ±10V,

±5V, and 0V to 8.192V, while the innovative design

• 110mW Typ Power Dissipation at 250kSPS

allows operation from a single 5V supply with power

• 28-Pin SSOP Package

dissipation under 125mW.

• Simple DSP Interface

The ADS8519 is available in a 28-pin SSOP

package, and is fully specified for operation over the

APPLICATIONS

industrial –40°C to +85°C temperature range.

• Industrial Process Control

• Data Acquisition Systems

• Digital Signal Processing

• Medical Equipment

• Instrumentation

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2SPI is a trademark of Motorola, Inc.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (28 pages)

PAGE 1
ADS8519 www.ti.com SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 16-Bit, 250kSPS, Serial, CMOS, Sampling ANALOG-TO-DIGITAL CONVERTER Check for Samples: ADS8519 FEATURES DESCRIPTION • • • • • The ADS8519 is a complete 16-bit sampling analog-to-digital (A/D) converter using state-of-the-art CMOS structures. It contains a complete 16-bit, capacitor-based, successive approximation register (SAR) A/D converter with sample-and-hold, reference, clock, and a serial data interface.
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ADS8519 SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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ADS8519 www.ti.com SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 ELECTRICAL CHARACTERISTICS (continued) At TA = –40°C to +85°C, fs = 250kSPS, and VDIG = VANA = 5V, using internal reference (unless otherwise specified). ADS8519I PARAMETER TEST CONDITIONS MIN TYP ADS8519IB MAX MIN TYP MAX UNIT LSB (2) DC ACCURACY INL Integral linearity error –3 3 –1.5 1.5 DNL Differential linearity error –2 2 –1 1 No missing codes 15 Transition noise (3) Full-scale error (4) (5) 0.
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ADS8519 SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) At TA = –40°C to +85°C, fs = 250kSPS, and VDIG = VANA = 5V, using internal reference (unless otherwise specified). ADS8519I PARAMETER TEST CONDITIONS MIN ADS8519IB TYP MAX MIN TYP MAX UNIT DIGITAL INPUTS Logic levels VIL Low-level input voltage (9) VDIG = 1.65V to 5.25V –0.3 0.6 –0.3 0.6 VIH High-level input voltage (9) VDIG = 1.65V to 5.25V 0.5 x VDIG VDIG + 0.3 0.
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ADS8519 www.ti.
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ADS8519 SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com Pin Assignments PIN 6 NAME NO. I/O AGND1 2 – Analog ground. Used internally as ground reference point. Minimal current flow. DESCRIPTION AGND2 9 – Analog ground BUSY 25 O Busy output. Falls when a conversion is started, and remains low until the conversion is completed and the data are latched into the output shift register. CS 24 – Chip select. Internally ORed with R/C. CAP 6 Reference buffer capacitor, 2.
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ADS8519 www.ti.com SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 TIMING REQUIREMENTS, TA = –40°C to +85°C PARAMETER MIN TYP MAX 6 20 ns 2.2 ms tw1 Pulse duration, convert td1 Delay time, BUSY from R/C low tw2 Pulse duration, BUSY low td2 Delay time, BUSY, after end of conversion 5 td3 Delay time, aperture 5 tconv Conversion time tacq Acquisition time tconv + tacq 40 ns ns ns 2.2 1.
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ADS8519 SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.
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ADS8519 www.ti.
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ADS8519 SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.
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ADS8519 www.ti.com SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 Tag 18 Tag 17 Tag 16 Tag 15 Tag 2 Tag 0 Tag 1 Bit 15 (MSB) t c2 t su2 t su1 0 TAG DATA SYNC BUSY R/C CS External DATACLK t w1 t su2 t d1 t w3 t d7 1 t c2 t w4 2 t d8 3 Bit 14 4 Bit 1 17 18 Bit 0 (LSB) Tag 0 t d9 Tag 1 Tag 19 TIMING DIAGRAMS (continued) Figure 8.
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ADS8519 SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com Tag 18 Tag 17 Tag 1 TAG Tag 16 Bit 15 (MSB) DATA SYNC t d1 BUSY R/C CS External DATACLK t su2 t w3 t c2 t w1 t w4 t su1 t su1 Tag 0 t c2 t d8 t d10 Bit 0 (LSB) Tag 0 t d8 Tag 1 Tag 19 TIMING DIAGRAMS (continued) Figure 9.
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ADS8519 www.ti.com SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 TYPICAL CHARACTERISTICS SUPPLY CURRENT vs FREE-AIR TEMPERATURE HISTOGRAM 25 8000 6930 4000 3000 2000 712 547 65531 65532 Code 65533 18 4.098 4.096 4.094 4.092 -20 0 20 40 60 TA - Free-Air Temperature - °C 4.09 -40 80 -20 0 20 40 60 TA - Free-Air Temperature - °C 80 Figure 11. Figure 12.
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ADS8519 SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) TOTAL HARMONIC DISTORTION vs FREE-AIR TEMPERATURE -85 -80 -75 fS = 250kSPS fI = 20kHz 95 fS = 250kSPS fI = 20kHz 90 85 80 75 70 -40 -20 0 20 40 60 80 TA - Free-Air Temperature - °C SNR - Signal-to-Noise and Distortion - dB -90 0 40 -20 20 60 TA - Free-Air Temperature - °C 80 95 90 85 80 75 70 -40 -20 0 20 40 60 TA - Free-Air Temperature - °C 80 Figure 20. Figure 21.
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ADS8519 www.ti.com SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 TYPICAL CHARACTERISTICS (continued) INL 2 1.5 INL - LSBs 1 0.5 0 -0.5 -1 -1.5 -2 0 10000 20000 30000 40000 50000 60000 70000 50000 60000 70000 Code Figure 26. DNL 2 1.5 DNL - LSBs 1 0.5 0 -0.5 -1 -1.5 -2 0 10000 20000 30000 40000 Code Figure 27. BASIC OPERATION Two signals control conversion in the ADS8519: CS and R/C. These two signals are internally ORed together.
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ADS8519 SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com INTERNAL DATACLK In the internal clock mode, data for the previous conversion are clocked out during each conversion period. The internal data clock is synchronized to the internal conversion clock so that it does not interfere with the conversion process. The DATACLK pin becomes an output when EXT/INT is low.
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ADS8519 www.ti.com SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 TAG FEATURE The TAG feature allows the data from multiple ADS8519 converters to be read on a single serial line. The converters are cascaded together using the DATA pins as outputs and the TAG pins as inputs, as illustrated in Figure 28. The DATA pin of the last converter drives the processor serial data input. Data are then shifted through each converter, synchronous to the externally supplied data clock, onto the serial data line.
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ADS8519 SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com ANALOG INPUTS The ADS8519 has three analog input ranges, as shown in Table 2. The offset specification is factory-calibrated with internal resistors. The gain specification is factory-calibrated with 0.1%, 0.25W, external resistors, as shown in Figure 29 and Figure 30. The external resistors can be omitted if a larger gain error is acceptable or if using software calibration.
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ADS8519 www.ti.com SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 With Trim (Adjust Gain) Without Trim Input Range VIN R1IN ±10V R1IN VIN AGND1 AGND1 R2IN R2IN R3IN R3IN +5V CAP 2.2µF 50kΩ REF 2.2µF 576kΩ REF 2.2µF 2.2µF AGND2 VIN AGND2 R1IN R1IN AGND1 AGND1 R2IN ±5V CAP VIN R2IN R3IN R3IN 2.2µF +5V CAP 2.2µF REF 2.2µF AGND2 50kΩ CAP 576kΩ REF 2.2µF AGND2 Figure 30.
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ADS8519 SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com Neither the internal reference nor the buffer should be used to drive an external load. Such loading can degrade performance. Any load on the internal reference causes a voltage drop across the 4kΩ resistor and affects gain. The internal buffer is capable of driving ±2mA loads, but any load can cause perturbations of the reference at the CDAC, degrading performance.
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ADS8519 www.ti.com SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 Table 4. Output Codes and Ideal Input Voltages DESCRIPTION ANALOG INPUT RANGE DIGITAL OUTPUT BINARY TWOS COMPLEMENT (SB/BTC LOW) STRAIGHT BINARY (SB/BTC HIGH) Full-scale range ±10V ±5V 0V to 8.192V Least significant bit (LSB) 305mV 153mV 125mV BINARY CODE HEX CODE BINARY CODE HEX CODE +Full-scale (FS – 1LSB) 9.999695V 4.999847V 8.191875V 0111 1111 1111 1111 7FFF 1111 1111 1111 1111 FFFF Midscale 0V 0V 4.
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ADS8519 SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (June, 2009) to Revision D • Page Changed input/output description for SB/BTC pin (pin 12) ...................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 22-Sep-2010 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ADS8519IBDBR SSOP DB 28 2000 330.0 16.4 8.1 10.4 2.5 12.0 16.0 Q1 ADS8519IDBR SSOP DB 28 2000 330.0 16.4 8.1 10.4 2.5 12.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ADS8519IBDBR SSOP DB 28 2000 367.0 367.0 38.0 ADS8519IDBR SSOP DB 28 2000 367.0 367.0 38.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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