Datasheet

AM3517, AM3505
www.ti.com SPRS550E –OCTOBER 2009–REVISED MARCH 2013
Table 6-6. GPMC/NOR Flash Interface Asynchronous Timing – Internal Parameters
(1) (2)
(continued)
NO. PARAMETER 1.8V,3.3V UNIT
MIN MAX
FI7 Maximum output enable generation delay from internal functional clock 6.5 ns
FI8 Maximum write enable generation delay from internal functional clock 6.5 ns
FI9 Maximum functional clock skew 100 ps
Table 6-7. GPMC/NOR Flash Interface Timing Requirements – Asynchronous Mode
NO. PARAMETER 1.8V,3.3V UNIT
MIN MAX
FA5
(1)
t
acc(DAT)
Data maximum access time H
(2)
GPMC_FCLK cycles
FA20
(3)
t
acc1-pgmode(DAT)
Page mode successive data maximum P
(4)
GPMC_FCLK cycles
access time
FA21
(5)
t
acc2-pgmode(DAT)
Page mode first data maximum access H
(2)
GPMC_FCLK cycles
time
(1) The FA5 parameter illustrates the amount of time required to internally sample input Data. It is expressed in number of GPMC functional
clock cycles. From start of read cycle and after FA5 functional clock cycles, input Data is internally sampled by active functional clock
edge. FA5 value must be stored inside the AccessTime register bit field.
(2) H = AccessTime * (TimeParaGranularity + 1)
(3) The FA20 parameter illustrates amount of time required to internally sample successive input Page Data. It is expressed in number of
GPMC functional clock cycles. After each access to input Page Data, next input Page Data is internally sampled by active functional
clock edge after FA20 functional clock cycles. The FA20 value must be stored in the PageBurstAccessTime register bit field.
(4) P = PageBurstAccessTime * (TimeParaGranularity + 1)
(5) The FA21 parameter illustrates amount of time required to internally sample first input Page Data. It is expressed in number of GPMC
functional clock cycles. From start of read cycle and after FA21 functional clock cycles, First input Page Data is internally sampled by
active functional clock edge. FA21 value must be stored inside the AccessTime register bit field.
Table 6-8. GPMC/NOR Flash Interface Switching Characteristics – Asynchronous Mode
NO. PARAMETER 1.8V/ 3.3V UNIT
MIN MAX
t
R(DO)
Rise time, output data 2.0 ns
t
F(DO)
Fall time, output data 2.0 ns
FA0 t
W(nBEV)
Pulse duration, Read N(12) ns
gpmc_nbe0_cle,
Write N(12) ns
gpmc_nbe1 valid time
FA1 t
W(nCSV)
Pulse duration, Read A(1) ns
gpmc_ncsx(13) v low
Write A(1) ns
FA3 t
d(nCSV-nADVIV)
Delay time, Read B(2) – 0.2 B(2) + 2.0 ns
gpmc_ncsx(13) valid to
Write B(2) – 0.2 B(2) + 2.0 ns
gpmc_nadv_ale invalid
FA4 t
d(nCSV-nOEIV)
Delay time, gpmc_ncsx(13) valid to C(3) – 0.2 C(3) + 2.0 ns
gpmc_noe invalid (Single read)
FA9 t
d(AV-nCSV)
Delay time, address bus valid to J(9) – 0.2 J(9) + 2.0 ns
gpmc_ncsx(13) valid
FA10 t
d(nBEV-nCSV)
Delay time, gpmc_nbe0_cle, J(9) – 0.2 J(9) + 2.0 ns
gpmc_nbe1 valid to gpmc_ncsx(13)
valid
FA12 t
d(nCSV-nADVV)
Delay time, gpmc_ncsx(13) valid to K(10) – 0.2 K(10) + 2.0 ns
gpmc_nadv_ale valid
FA13 t
d(nCSV-nOEV)
Delay time, gpmc_ncsx(13) valid to L(11) – 0.2 L(11) + 2.0 ns
gpmc_noe valid
FA14 t
d(nCSV-IODIR)
Delay time, gpmc_ncsx(13) valid to L(11) – 0.2 L(11) + 2.0 ns
gpmc_io_dir high
FA15 t
d(nCSV-IODIR)
Delay time, gpmc_ncsx(13) valid to M(14) – 0.2 M(14) + 2.0 ns
gpmc_io_dir low
FA16 t
w(AIV)
Address invalid duration between 2 G(7) ns
successive R/W accesses
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