Datasheet

gpmc_fclk
gpmc_clk
gpmc_ncsx
gpmc_a[26:17]
gpmc_nbe0_cle
gpmc_nbe1
gpmc_nadv_ale
gpmc_nwe
gpmc_a[16:1]_d[15:0]
gpmc_waitx
gpmc_io_dir
Address(MSB)
Valid Address(LSB) DataOUT
OUT
FA0
FA1
FA9
FA10
FA3
FA25
FA29
FA12
FA27
FA28
FA0
FA10
030-031
AM3517, AM3505
SPRS550E –OCTOBER 2009–REVISED MARCH 2013 www.ti.com
In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7. In gpmc_waitx, x is equal to 0, 1, 2, or 3.
Figure 6-12. GPMC/Multiplexed NOR Flash – Asynchronous Write – Single Word Timing
6.4.1.3 GPMC/NAND Flash Interface Timing
The following tables assume testing over the recommended operating conditions and electrical
characteristic conditions.
Table 6-9. GPMC/NAND Flash Asynchronous Mode Timing Conditions
TIMING CONDITION PARAMETER 1.8V, 3.3V UNIT
MIN MAX
Input Conditions
t
R
Input signal rise time 1.8 ns
t
F
Input signal fall time 1.8 ns
C
LOAD
Output load capacitance 30 pF
124 Timing Requirements and Switching Characteristics Copyright © 2009–2013, Texas Instruments Incorporated
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