Datasheet

A1
A1
X
Y
OFFSET
Recommended LPDDR Device
Orientation
Y
Y
OFFSET
LPDDR
Device
LPDDR
Controller
Microprocessor
AM3517, AM3505
www.ti.com SPRS550E –OCTOBER 2009–REVISED MARCH 2013
Figure 6-19. AM3517/05 and LPDDR Device Placement
Table 6-16. Placement Specifications
NO. PARAMETER MIN MAX UNIT NOTES
1 X 1440 Mils See Notes
(1)
,
(2)
2 Y 1030 Mils See Notes
(1)
,
(2)
3 Y Offset 525 Mils See Notes
(1)
,
(2)
,
(3)
4 LPDDR Keepout Region See Note
(4)
Clearance from non-LPDDR signal to LPDDR
5 4 w See Note
(5)
Keepout Region
(1) See Figure 6-19 for dimension definitions.
(2) Measurements from center of device to center of LPDDR device.
(3) For 16 bit memory systems it is recommended that Y Offset be as small as possible.
(4) LPDDR keepout region to encompass entire LPDDR routing area.
(5) Non-LPDDR signals allowed within LPDDR keepout region provided they are separated from LPDDR routing layers by a ground plane.
6.4.2.1.5 LPDDR Keep Out Region
The region of the PCB used for the LPDDR circuitry must be isolated from other signals. The LPDDR
keep out region is defined for this purpose and is shown in Figure 6-20. The size of this region varies with
the placement and LPDDR routing. Additional clearances required for the keep out region are shown in
Table 6-16.
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