Datasheet

A1
A1
LPDDRController
LPDDRDevice
RegionshouldencompassallLPDDRcircuitryandvariesdepending
onplacement.Non-LPDDRsignalsshouldnotberoutedonthe
LPDDRsignallayerswithintheLPDDRkeepoutregion.Non-LPDDR
signalsmayberoutedintheregionprovidedtheyareroutedon
layersseparatedfromLPDDRsignallayersbyagroundlayer.No
breaksshouldbeallowedinthereferencegroundlayersinthis
region.Inaddition,the1.8Vpowerplaneshouldcovertheentirekeep
outregion.
AM3517, AM3505
SPRS550E –OCTOBER 2009–REVISED MARCH 2013 www.ti.com
Figure 6-20. LPDDR Keepout Region
6.4.2.1.6 Net Classes
Table 6-17 lists the clock net classes for the LPDDR interface. Table 6-18 lists the signal net classes, and
associated clock net classes, for the signals in the LPDDR interface. These net classes are used for the
termination and routing rules that follow.
Table 6-17. Clock Net Class Definitions
CLOCK NET CLASS PIN NAMES
CK sdrc_clk/sdrc_nclk
DQS0 sdrc_dqs0
DQS1 sdrc_dqs1
DQS2 sdrc_dqs2
DQS3 sdrc_dqs3
Table 6-18. Signal Net Class Definitions
CLOCK NET CLASS ASSOCIATED CLOCK NET CLASS PIN NAMES
sdrc_ba, sdrc_a, sdrc_ncs0, sdrc_ncas,
ADDR_CTRL CK
sdrc_nras, sdrc_nwe, sdrc_cke0
DQ0 DQS0 sdrc_d, sdrc_dm0
DQ1 DQS1 sdrc_d, sdrc_dm1
DQ2 DQS2 sdrc_d, sdrc_dm2
DQ3 DQS3 sdrc_d, sdrc_dm3
6.4.2.1.7 LPDDR Signal Termination
No terminations of any kind are required in order to meet signal integrity and overshoot requirements.
Serial terminators are permitted, if desired, to reduce EMI risk; however, serial terminations are the only
type permitted. Table 6-19 shows the specifications for the series terminators.
134 Timing Requirements and Switching Characteristics Copyright © 2009–2013, Texas Instruments Incorporated
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