Datasheet

12
17
18
19
20
21
14
15
16
13
CCDC_FIELD
CCDC_
PCLK
CCDC_HDCCDC_WEN
CCDC_
DATA2
RMII_
MDIO_DATA
RMII_
CRS_DV
RMII_
50MHZ_CLK
MMC1_DAT0MMC1_CMDMMC2_CLK
VSS
GPMC_CLK
GPMC_NOE
HECC1_TXD
HECC1_RXD
I2C1_SDA
SYS_NIRQ
SYS_BOOT0
SYS_BOOT1SYS_BOOT7
SYS_BOOT3
SYS_NRES
PWRON
I2C1_SCL
SYS_BOOT8
M
N P R
T
U V
W
Y
22
AA AB
VDDSHV VSS
CCDC_VD
CCDC_
DATA0
CCDC_
DATA4
RMII_
MDIO_CLK
RMII_TXD0
RMII_RXER
MMC1_CLKMMC1_DAT4
VSS
MMC1_DAT3MMC1_DAT1
MMC1_DAT2MMC1_DAT5
MMC1_DAT7
MMC1_DAT6
VSS
VDDSHV VSS
VDDSHV
VDD_CORE VDD_CORE
VSS
VDD_CORE
VSS
VSS
VDD_CORE
VSS
VDD_CORE
VSS
VDD_CORE VDD_CORE
VSS VSS
CCDC_
DATA6
CCDC_
DATA5
CCDC_
DATA7
VSS
VDDSHV
VSS
VSS
VDDSHV
RMII_RXD1
RMII_RXD0
VSS
VDDSHV
VDDS
VDDSHV
VSS
RESERVED
RESERVED
I2C3_SCL
UART3_CTS
_RCTX
SYS_NRE
SWARM
I2C2_SCLI2C3_SDA
GPMC_
WAIT1
GPMC_NWEGPMC_NBE1
GPMC_
NADV_ALE
UART3_RX
_IRRX
UART3_TX
_IRTX
UART3_RTS
_SD
GPMC_
WAIT0
GPMC_NCS3 GPMC_NCS5 GPMC_NCS2 GPMC_NCS6
M
N P R
T
U V
W
Y
AA AB
12
17
18
19
20
21
14
15
16
13
22
MMC2_CMD
RMII_TXD1
CCDC_
DATA1
MMC2_DAT7
RMII_TXEN
CCDC_
DATA3
SYS_BOOT6 SYS_BOOT5
MMC2_DAT2
VDDSHV VDDSHV
SYS_BOOT4 SYS_BOOT2
CAP_VDD
_SRAM_MPU
VSS VDDSHV
VSS VDDSHV VSS
I2C2_SDA
VSS VDDSHV
GPMC_
WAIT3
GPMC_NWP
GPMC_
WAIT2
VDD_CORE
VSS
AM3517, AM3505
SPRS550E –OCTOBER 2009–REVISED MARCH 2013 www.ti.com
Figure 2-6. ZER Pin Map [Quadrant B]
14 Terminal Description Copyright © 2009–2013, Texas Instruments Incorporated
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