Datasheet

A1
A1
X
Y
OFFSET
Recommended DDR2
Device Orientation
Y
Y
OFFSET
DDR2
Device
DDR2
Controller
Microprocessor
AM3517, AM3505
www.ti.com SPRS550E –OCTOBER 2009–REVISED MARCH 2013
Table 6-24. PCB Stack Up Specifications
No. Parameter Min Typ Max Unit Notes
1 PCB Routing/Plane Layers 6
2 Signal Routing Layers 3
3 Full ground layers under DDR2 routing Region 2
4 Number of ground plane cuts allowed within DDR routing region 0
5 Number of ground reference planes required for each DDR2 routing layer 1
6 Number of layers between DDR2 routing layer and ground plane 0
7 PCB Routing Feature Size 4 Mils
8 PCB Trace Width w 4 Mils
9 PCB BGA escape via pad size 20 Mils
10 PCB BGA escape via hole size 10 Mils
11 AM3517/05 BGA pad size 12 See Note
(1)
12 DDR2 Device BGA pad size See Note
(2)
13 Single Ended Impedance, Zo 50 75 Ω
14 Impedance Control Z-5 Z Z+5 Ω See Note
(3)
(1) The recommended pad size is 0.3 mm per IPC-7351 specification.
(2) Please refer to IPC standard IPC-7351 or manufacturer's recommendations for correct BGA pad size.
(3) Z is the nominal singled ended impedance selected for the PCB specified by item 12.
6.4.2.2.4 Placement
Figure 6-24 shows the required placement for the DDR2 devices. The dimensions for Figure 6-25 are
defined in Table 6-25. The placement does not restrict the side of the PCB that the devices are mounted
on. The ultimate purpose of the placement is to limit the maximum trace lengths and allow for proper
routing space. For single-memory DDR2 systems, the second DDR2 device is omitted from the
placement.
Figure 6-25. DDR2 Device Placement
Copyright © 2009–2013, Texas Instruments Incorporated Timing Requirements and Switching Characteristics 141
Submit Documentation Feedback
Product Folder Links: AM3517 AM3505