Datasheet

AM3517, AM3505
SPRS550E –OCTOBER 2009–REVISED MARCH 2013 www.ti.com
Table 6-45. McBSP1 Timing Requirements - Falling Edge and Receive Mode (continued)
No. PARAMETER VDDSHV = 3.3V VDDSHV = 1.8V UNIT
B6 th(CLKAE-FSV) Hold time, Half Cycle 0.5 0.5 ns
mcbsp1_fsr / Slave
mcbsp1_fsx
Full Cycle 1.0 1.0 ns
valid after
Slave
mcbsp1_clkr /
mcbsp1_clkx
active edge
Table 6-46. McBSP1 Switching Characteristics - Falling Edge and Receive Mode
No. PARAMETER VDDSHV = 3.3V VDDSHV = 1.8V UNIT
MIN MAX MIN MAX
B2 td(CLKAE-FSV) Delay time, mcbsp1_clkr / 0.2 14.8 0.7 14.8 ns
mcbsp1_clkx active edge to
mcbsp1_fsr / mcbsp1_fsx valid
Table 6-47. McBSP1 Timing Requirements - Falling Edge and Transmit Mode
No. PARAMETER VDDSHV = 3.3V VDDSHV = 1.8V UNIT
MIN MAX MIN MAX
B5 tsu(FSXV- Setup time, Half Cycle 5.2 5.2 ns
CLKXAE) mcbsp1_fsx Slave
valid before
Full Cycle 4.2 4.2 ns
mcbsp1_clkx
Slave
active edge
B6 th(CLKXAE- Hold time, Half Cycle 5.2 5.2 ns
FSXV) mcbsp1_fsx Slave
valid after
Full Cycle 1.0 1.0 ns
mcbsp1_clkx
Slave
active edge
Table 6-48. McBSP1 Switching Characteristics - Falling Edge and Transmit Mode
No. PARAMETER VDDSHV = 3.3V VDDSHV = 1.8V UNIT
MIN MAX MIN MAX
B2 td(CLKXAE- Delay time, 0.2 14.8 0.2 14.8 ns
FSXV) mcbsp1_clkx
active edge to
mcbsp1_fsx
valid
B8 td(CLKXAE- Delay time, Master 0.6 14.8 0.6 14.8 ns
DXV) mcbsp1_clkx
Slave 0.6 14.8 0.6 14.8 ns
active edge to
mcbsp1_dx
valid
158 Timing Requirements and Switching Characteristics Copyright © 2009–2013, Texas Instruments Incorporated
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