Datasheet

AM3517, AM3505
www.ti.com SPRS550E –OCTOBER 2009–REVISED MARCH 2013
6.6.3 Multiport Full-Speed Universal Serial Bus (USB) Interface
The AM3517/05 microprocessor provides three USB ports working in full- and low-speed data transactions
(up to 12Mbit/s).
Connected to either a serial link controller or a serial PHY (PHY interface modes) it supports:
• 6-pin (Tx: Dat/Se0 or Tx: Dp/Dm) unidirectional mode
• 4-pin bidirectional mode
• 3-pin bidirectional mode
6.6.3.1 Multiport Full-Speed Universal Serial Bus (USB) – Unidirectional Standard 6-pin Mode
The following tables assume testing over the recommended operating conditions.
Table 6-98. Low-/Full-Speed USB Timing Conditions Unidirectional Standard 6-pin Mode
TIMING CONDITION PARAMETER 1.8V, 3.3V UNIT
Input Conditions
t
R
Input signal rise time 2.0 ns
t
F
Input signal fall time 2.0 ns
Output Conditions
C
LOAD
Output load capacitance 15.0 pF
Table 6-99. Low-/Full-Speed USB Timing Requirements Unidirectional Standard 6-pin Mode
NO. PARAMETER 1.8V, 3.3V UNIT
MIN MAX
FSU1 t
d(Vp,Vm)
Time duration, mmx_rxdp and mmx_rxdm low together during transition 14.0 ns
FSU2 t
d(Vp,Vm)
Time duration, mmx_rxdp and mmx_rxdm high together during transition 8.0 ns
FSU3 t
d(RCVU0)
Time duration, mmx_rrxcv undefine during a single end 0 (mmx_rxdp and 14.0 ns
mmx_rxdm low together)
FSU4 t
d(RCVU1)
Time duration, mmx_rxrcv undefine during a single end 1 (mmx_rxdp and 8.0 ns
mmx_rxdm high together)
Table 6-100. Low-/Full-Speed USB Switching Characteristics Unidirectional Standard 6-pin Mode
NO. PARAMETER 1.8V, 3.3V UNIT
MIN MAX
FSU5 t
d(TXENL-DATV)
Delay time, mmx_txen_n low to mmx_txdat valid 81.8 84.8 ns
FSU6 t
d(TXENL-SE0V)
Delay time, mmx_txen_n low to mmx_txse0 valid 81.8 84.8 ns
FSU7 t
s(DAT-SE0)
Skew between mmx_txdat and mmx_txse0 transition 1.5 ns
FSU8 t
d(DATI-TXENH)
Delay time, mmx_txdat invalid to mmx_txen_n high 81.8 ns
FSU9 t
d(SE0I-TXENH)
Delay time, mmx_txse0 invalid to mmx_txen_n high 81.8 ns
t
R(do)
Rise time, mmx_txen_n 4.0 ns
t
F(do)
Fall time, mmx_txen_n 4.0 ns
t
R(do)
Rise time, mmx_txdat 4.0 ns
t
F(do)
Fall time, mmx_txdat 4.0 ns
t
R(do)
Rise time, mmx_txse0 4.0 ns
t
F(do)
Fall time, mmx_txse0 4.0 ns
Copyright © 2009–2013, Texas Instruments Incorporated Timing Requirements and Switching Characteristics 179
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