Datasheet

mmx_txen_n
mmx_txdat
mmx_txse0
mmx_rxdp
mmx_rxdm
mmx_rxrcv
FSU5
FSU6 FSU7
FSU1
FSU1
FSU2
FSU2
FSU3 FSU4
FSU8
FSU9
Transmit
Receive
030-080
AM3517, AM3505
SPRS550E –OCTOBER 2009–REVISED MARCH 2013 www.ti.com
In mmx, x is equal to 0, 1, or 2.
Figure 6-47. Low-/Full-Speed USB Unidirectional Standard 6-pin Mode
6.6.3.2 Multiport Full-Speed Universal Serial Bus (USB) – Bidirectional Standard 4-pin Mode
The following tables assume testing over the recommended operating conditions.
Table 6-101. Low-/Full-Speed USB Timing Conditions Bidirectional Standard 4-pin Mode
TIMING CONDITION PARAMETER 1.8V, 3.3V UNIT
Input Conditions
t
R
Input signal rise time 2.0 ns
t
F
Input signal fall time 2.0 ns
Output Conditions
C
LOAD
Output load capacitance 15.0 pF
Table 6-102. Low-/Full-Speed USB Timing Requirements Bidirectional Standard 4-pin Mode
NO. PARAMETER 1.8V, 3.3V UNIT
MIN MAX
FSU10 t
d(DAT,SE0)
Time duration, mmx_txdat and mmx_txse0 low together during 14.0 ns
transition
FSU11 t
d(DAT,SE0)
Time duration, mmx_txdat and mmx_txse0 high together during 8.0 ns
transition
FSU12 t
d(RCVU0)
Time duration, mmx_rrxcv undefine during a single end 0 14.0 ns
(mmx_txdat and mmx_txse0 low together)
FSU13 t
d(RCVU1)
Time duration, mmx_rxrcv undefine during a single end 1 8.0 ns
(mmx_txdat and mmx_txse0 high together)
Table 6-103. Low-/Full-Speed USB Switching Characteristics Bidirectional Standard 4-pin Mode
NO. PARAMETER 1.8V, 3.3V UNIT
MIN MAX
FSU14 t
d(TXENL-DATV)
Delay time, mmx_txen_n low to mmx_txdat valid 81.8 84.8 ns
FSU15 t
d(TXENL-SE0V)
Delay time, mmx_txen_n low to mmx_txse0 valid 81.8 84.8 ns
FSU16 t
s(DAT-SE0)
Skew between mmx_txdat and mmx_txse0 transition 1.5 ns
FSU17 t
d(DATV-TXENH)
Delay time, mmx_txdat invalid before mmx_txen_n high 81.8 ns
FSU18 t
d(SE0V-TXENH)
Delay time, mmx_txse0 invalid before mmx_txen_n high 81.8 ns
t
R(txen)
Rise time, mmx_txen_n 4.0 ns
180 Timing Requirements and Switching Characteristics Copyright © 2009–2013, Texas Instruments Incorporated
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