Datasheet

AM3517, AM3505
www.ti.com SPRS550E –OCTOBER 2009–REVISED MARCH 2013
Table 2-1. Ball Characteristics (ZCN Pkg.) (continued)
BALL PIN NAME MODE [3] TYPE [4] BALL BALL RESET REL. POWER [8] VOLTAGE HYS [10] LOAD (pF) PULL U/D IO CELL [13]
LOCATION [2] RESET RESET REL. MODE [7] [9] [11] TYPE [12]
[1] STATE [5] STATE [6]
D8 sdrc_a14 0 O L Z 0 VDDS 1.8V No 8 PU/ PD LVCMOS
E13 sdrc_ncs0 0 O L Z 0 VDDS 1.8V No 8 PU/ PD LVCMOS
A14 sdrc_ncs1 0 O L Z 0 VDDS 1.8V No 8 PU/ PD LVCMOS
A13 sdrc_clk 0 O L Z 0 VDDS 1.8V Yes 8 PU/ PD LVCMOS
B13 sdrc_nclk 0 O L Z 0 VDDS 1.8V No 8 PU/ PD LVCMOS
D14 sdrc_cke0 0 O L PD 7 VDDS 1.8V Yes 8 PU/ PD LVCMOS
sdrc_cke0_s 7 L
afe
C14 sdrc_nras 0 O L Z 0 VDDS 1.8V No 8 PU/ PD LVCMOS
E14 sdrc_ncas 0 O L Z 0 VDDS 1.8V No 8 PU/ PD LVCMOS
B14 sdrc_nwe 0 O L Z 0 VDDS 1.8V No 8 PU/ PD LVCMOS
C21 sdrc_dm0 0 O L Z 0 VDDS 1.8V No 8 PU/ PD LVCMOS
B15 sdrc_dm1 0 O L Z 0 VDDS 1.8V No 8 PU/ PD LVCMOS
E8 sdrc_dm2 0 O L Z 0 VDDS 1.8V No 8 PU/ PD LVCMOS
D1 sdrc_dm3 0 O L Z 0 VDDS 1.8V No 8 PU/ PD LVCMOS
B20 sdrc_dqs0p 0 IO L Z 0 VDDS 1.8V Yes 8 PU/ PD LVCMOS
B17 sdrc_dqs1p 0 IO L Z 0 VDDS 1.8V Yes 8 PU/ PD LVCMOS
A6 sdrc_dqs2p 0 IO L Z 0 VDDS 1.8V Yes 8 PU/ PD LVCMOS
A2 sdrc_dqs3p 0 IO L Z 0 VDDS 1.8V Yes 8 PU/ PD LVCMOS
A20 sdrc_dqs0n 0 IO L Z 0 VDDS 1.8V 8 PU/ PD LVCMOS
A17 sdrc_dqs1n 0 IO L Z 0 VDDS 1.8V 8 PU/ PD LVCMOS
B6 sdrc_dqs2n 0 IO L Z 0 VDDS 1.8V 8 PU/ PD LVCMOS
B2 sdrc_dqs3n 0 IO L Z 0 VDDS 1.8V 8 PU/ PD LVCMOS
C8 sdrc_odt 0 L Z 0 VDDS 1.8V 8 PU/ PD LVCMOS
A19 sdrc_strben0 0 L Z 0 VDDS 1.8V 8 PU/ PD LVCMOS
A18 sdrc_strben_ 0 L Z 0 VDDS 1.8V 8 PU/ PD LVCMOS
dly0
A5 sdrc_strben1 0 L Z 0 VDDS 1.8V 8 PU/ PD LVCMOS
A4 sdrc_strben_ 0 L Z 0 VDDS 1.8V 8 PU/ PD LVCMOS
dly1
B12 ddr_padref 0 A VDDS 1.8V
E3 gpmc_a1 0 O L PD 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS
gpio_34 4 IO
safe_mode 7
E2 gpmc_a2 0 O L PD 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS
gpio_35 4 IO
safe_mode 7
E1 gpmc_a3 0 O L PD 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS
gpio_36 4 IO
safe_mode 7
F7 gpmc_a4 0 O L PD 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS
gpio_37 4 IO
safe_mode 7
F6 gpmc_a5 0 O L PD 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS
gpio_38 4 IO
safe_mode 7
F4 gpmc_a6 0 O H PU 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS
gpio_39 4 IO
safe_mode 7
F3 gpmc_a7 0 O H PU 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS
gpio_40 4 IO
safe_mode 7
F2 gpmc_a8 0 O H PU 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS
gpio_41 4 IO
safe_mode 7
F1 gpmc_a9 0 O H PU 7 VDDSHV 1.8V/3.3V Yes 30 PU/ PD LVCMOS
Copyright © 2009–2013, Texas Instruments Incorporated Terminal Description 19
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