Datasheet

mmcx_clk
mmcx_cmd
mmcx_dat[3:0]
SD3
SD7
SD4
SD8
SD1 SD2
030-108
AM3517, AM3505
www.ti.com SPRS550E –OCTOBER 2009–REVISED MARCH 2013
Table 6-151. MMC/SD/SDIO Switching Characteristics Standard SD Mode
(1)(2)
(continued)
NO. PARAMETER 1.8V, 3.3V UNIT
MIN MAX
SD5 t
d(CLKOH-CMD)
Delay time, mmc1_clk rising clock edge to mmc1_cmd 6.13 35.53 ns
transition
SD6 t
d(CLKOH-DATx)
Delay time, mmc1_clk rising clock edge to mmc1_datx 6.13 35.53 ns
transition
MMC/SD/SDIO Interface 2
t
r(clk)
Rise time, output clk 10 ns
t
f(clkH)
Fall time, output clk 10 ns
t
r(clkL)
Rise time, output data 10 ns
t
f(clk)
Fall time, output data 10 ns
SD5 t
d(CLKOH-CMD)
Delay time, mmc2_clk rising clock edge to mmc2_cmd 6.13 35.53 ns
transition
SD6 t
d(CLKOH-DATx)
Delay time, mmc2_clk rising clock edge to mmc2_datx 6.13 35.53 ns
transition
MMC/SD/SDIO Interface 3
t
r(clk)
Rise time, output clk 10 ns
t
f(clkH)
Fall time, output clk 10 ns
t
r(clkL)
Rise time, output data 10 ns
t
f(clk)
Fall time, output data 10 ns
SD5 t
d(CLKOH-CMD)
Delay time, mmc3_clk rising clock edge to mmc3_cmd 6.13 35.53 ns
transition
SD6 t
d(CLKOH-DATx)
Delay time, mmc3_clk rising clock edge to mmc3_datx 6.13 35.53 ns
transition
Table 6-152. X Parameter
CLKD X
1 or Even 0.5
Odd (trunc[CLKD/2]+1)/CLKD
Table 6-153. Y Parameter
CLKD Y
1 or Even 0.5
Odd (trunc[CLKD/2])/CLKD
For details about clock division factor CLKD, see the AM35x ARM Microprocessor Technical Reference
Manual (literature number SPRUGR0).
In mmcx, x is equal to 1, 2, or 3.
Figure 6-70. MMC/SD/SDIO Standard SD Mode Data/Command Receive
Copyright © 2009–2013, Texas Instruments Incorporated Timing Requirements and Switching Characteristics 209
Submit Documentation Feedback
Product Folder Links: AM3517 AM3505