Datasheet

AM3517, AM3505
SPRS550E –OCTOBER 2009–REVISED MARCH 2013 www.ti.com
Table 2-4. External Memory Interfaces - GPMC Signals Description (continued)
SIGNAL NAME[1] DESCRIPTION[2] TYPE[3] ZCN BALL[4] ZER BALL[4] SUBSYSTEM PIN
MULTIPLEXING [5]
gpmc_a18 GPMC Address bit18 O E2 Y5
multiplexed on
gpmc_a2
gpmc_a19 GPMC Address bit19 O E1 AB4
multiplexed on
gpmc_a3
gpmc_a20 GPMC Address bit20 O F7 AA5
multiplexed on
gpmc_a4
gpmc_a21 GPMC Address bit21 O F6 AB5
multiplexed on
gpmc_a5
gpmc_a22 GPMC Address bit22 O F4 AB6
multiplexed on
gpmc_a6
gpmc_a23 GPMC Address bit23 O F3 AA6
multiplexed on
gpmc_a7
gpmc_a24 GPMC Address bit24 O F2 W6
multiplexed on
gpmc_a8
gpmc_a25 GPMC Address bit25 O F1 AB7
multiplexed on
gpmc_a9
gpmc_a26 GPMC Address bit26 O G6 Y6
multiplexed on
gpmc_a10
gpmc_d0 GPMC Data bit 0 IO G5 AA7 gpmc_a1/gpmc_d0
gpmc_d1 GPMC Data bit 1 IO G4 Y7 gpmc_a2/gpmc_d1
gpmc_d2 GPMC Data bit 2 IO G3 W7 gpmc_a3/gpmc_d2
gpmc_d3 GPMC Data bit 3 IO G2 AA9 gpmc_a4/gpmc_d3
gpmc_d4 GPMC Data bit 4 IO G1 Y8 gpmc_a5/gpmc_d4
gpmc_d5 GPMC Data bit 5 IO H2 AA8 gpmc_a6/gpmc_d5
gpmc_d6 GPMC Data bit 6 IO H1 AB8 gpmc_a7/gpmc_d6
gpmc_d7 GPMC Data bit 7 IO J5 W8 gpmc_a8/gpmc_d7
gpmc_d8 GPMC Data bit 8 IO J4 W10 gpmc_a9/gpmc_d8
gpmc_d9 GPMC Data bit 9 IO J3 AB9 gpmc_a10/gpmc_d9
gpmc_d10 GPMC Data bit 10 IO J2 AB10 gpmc_a11/gpmc_d10
gpmc_d11 GPMC Data bit 11 IO J1 W9 gpmc_a12/gpmc_d11
gpmc_d12 GPMC Data bit 12 IO K4 AA10 gpmc_a13/gpmc_d12
gpmc_d13 GPMC Data bit 13 IO K3 Y9 gpmc_a14/gpmc_d13
gpmc_d14 GPMC Data bit 14 IO K2 V10 gpmc_a15/gpmc_d14
gpmc_d15 GPMC Data bit 15 IO K1 V9 gpmc_a16/gpmc_d15
gpmc_ncs0 GPMC Chip Select 0 O L2 Y10
gpmc_ncs1 GPMC Chip Select 1 O L1 Y11
gpmc_ncs2 GPMC Chip Select 2 O M4 Y12
gpmc_ncs3 GPMC Chip Select 3 O M3 V12
gpmc_ncs4 GPMC Chip Select 4 O M2 AA11
gpmc_ncs5 GPMC Chip Select 5 O M1 W12
gpmc_ncs6 GPMC Chip Select 6 O N5 AA12
gpmc_ncs7 GPMC Chip Select 7 O N4 V11
gpmc_clk GPMC clock O N1 AB13
58 Terminal Description Copyright © 2009–2013, Texas Instruments Incorporated
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